From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N1kX6-0003of-WB for qemu-devel@nongnu.org; Sat, 24 Oct 2009 13:36:05 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N1kX6-0003oP-MI for qemu-devel@nongnu.org; Sat, 24 Oct 2009 13:36:04 -0400 Received: from [199.232.76.173] (port=34079 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N1kX6-0003oM-Fj for qemu-devel@nongnu.org; Sat, 24 Oct 2009 13:36:04 -0400 Received: from fg-out-1718.google.com ([72.14.220.152]:62697) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N1kX5-0007ZR-S7 for qemu-devel@nongnu.org; Sat, 24 Oct 2009 13:36:04 -0400 Received: by fg-out-1718.google.com with SMTP id d23so3786598fga.10 for ; Sat, 24 Oct 2009 10:36:03 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1256386749-85299-5-git-send-email-juha.riihimaki@nokia.com> References: <1256386749-85299-1-git-send-email-juha.riihimaki@nokia.com> <1256386749-85299-5-git-send-email-juha.riihimaki@nokia.com> Date: Sat, 24 Oct 2009 19:36:03 +0200 Message-ID: <761ea48b0910241036k578e4740la54870840474105@mail.gmail.com> Subject: Re: [Qemu-devel] [PATCH v2 04/10] target-arm: optimize vfp load/store multiple ops From: Laurent Desnogues Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: juha.riihimaki@nokia.com Cc: qemu-devel@nongnu.org On Sat, Oct 24, 2009 at 2:19 PM, wrote: > From: Juha Riihim=E4ki > > VFP load/store multiple instructions can be slightly optimized by > loading the register offset constant into a variable outside the > register loop and using the preloaded variable inside the loop instead > of reloading the offset value to a temporary variable on each loop > iteration. This causes less TCG ops to be generated for a VFP load/ > store multiple instruction if there are more than one register > accessed, otherwise the amount of generated TCG ops is the same. > > Signed-off-by: Juha Riihim=E4ki Acked-by: Laurent Desnogues Laurent > --- > =A0target-arm/translate.c | =A0 =A04 +++- > =A01 files changed, 3 insertions(+), 1 deletions(-) > > diff --git a/target-arm/translate.c b/target-arm/translate.c > index 8cb1c0f..38fb833 100644 > --- a/target-arm/translate.c > +++ b/target-arm/translate.c > @@ -3222,6 +3222,7 @@ static int disas_vfp_insn(CPUState * env, DisasCont= ext *s, uint32_t insn) > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 offset =3D 8; > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 else > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 offset =3D 4; > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0tmp =3D tcg_const_i32(offset); > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 for (i =3D 0; i < n; i++) { > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (insn & ARM_CP_RW_BIT) { > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* load */ > @@ -3232,8 +3233,9 @@ static int disas_vfp_insn(CPUState * env, DisasCont= ext *s, uint32_t insn) > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 gen_mov_F0_vreg(dp, rd + = i); > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 gen_vfp_st(s, dp, addr); > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0tcg_gen_addi_i32(addr, addr, off= set); > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0tcg_gen_add_i32(addr, addr, tmp)= ; > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 } > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0tcg_temp_free_i32(tmp); > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (insn & (1 << 21)) { > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* writeback */ > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (insn & (1 << 24)) > -- > 1.6.5 > > > >