From: Laurent Desnogues <laurent.desnogues@gmail.com>
To: nemesisofstate <nemesisofstate@gmail.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] correcting ARM CPSR register bit position comment
Date: Mon, 14 Dec 2009 13:15:50 +0100 [thread overview]
Message-ID: <761ea48b0912140415i5d78ddf8h8975aa39b4aee00d@mail.gmail.com> (raw)
In-Reply-To: <200912141207.22651.paul@codesourcery.com>
On Mon, Dec 14, 2009 at 1:07 PM, Paul Brook <paul@codesourcery.com> wrote:
>> - uint32_t VF; /* V is the bit 31. All other bits are undefined */
>> + uint32_t VF; /* V is the bit 28. */
>
> No. The original comment is correct.
And so that the answer is at least a bit useful: these fields
are not directly mapped to CPSR; they are the results of
computations and can then be translated to bits in CPSR
(look for cpsr_read/cpsr_write in helper.c). If you want to
see how VF is set, look for add_cc in op_helper.c. This is
done this way to speed up simulation.
HTH,
Laurent
prev parent reply other threads:[~2009-12-14 12:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-12-14 11:09 [Qemu-devel] [PATCH] correcting ARM CPSR register bit position comment nemesisofstate
2009-12-14 12:07 ` Paul Brook
2009-12-14 12:15 ` Laurent Desnogues [this message]
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