Re: [Qemu-devel] [PATCH 1/5] tcg: Generic support for conditional set

[Laurent Desnogues <laurent.desnogues@gmail.com>]

On Sat, Dec 19, 2009 at 7:01 PM, Richard Henderson <rth@twiddle.net> wrote:
> Defines setcond_{i32,i64} and setcond2_i32 for 64-on-32-bit.
>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  tcg/README    |   20 +++++++++++++++++++-
>  tcg/tcg-op.h  |   47 +++++++++++++++++++++++++++++++++++++++++++++++
>  tcg/tcg-opc.h |    3 +++
>  tcg/tcg.c     |   21 +++++++++++++++------
>  4 files changed, 84 insertions(+), 7 deletions(-)
[...]
> diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
> index faf2e8b..70a75a0 100644
> --- a/tcg/tcg-op.h
> +++ b/tcg/tcg-op.h
> @@ -280,6 +280,32 @@ static inline void tcg_gen_op6_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
>     *gen_opparam_ptr++ = GET_TCGV_I64(arg6);
>  }
>
> +static inline void tcg_gen_op6i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
> +                                    TCGv_i32 arg3, TCGv_i32 arg4,
> +                                    TCGv_i32 arg5, TCGArg arg6)
> +{
> +    *gen_opc_ptr++ = opc;
> +    *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
> +    *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
> +    *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
> +    *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
> +    *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
> +    *gen_opparam_ptr++ = arg6;
> +}
> +
> +static inline void tcg_gen_op6i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
> +                                    TCGv_i64 arg3, TCGv_i64 arg4,
> +                                    TCGv_i64 arg5, TCGArg arg6)
> +{
> +    *gen_opc_ptr++ = opc;
> +    *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
> +    *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
> +    *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
> +    *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
> +    *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
> +    *gen_opparam_ptr++ = arg6;
> +}
> +
>  static inline void tcg_gen_op6ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
>                                      TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5,
>                                      TCGArg arg6)
> @@ -1795,6 +1821,25 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
>     }
>  }
>
> +static inline void tcg_gen_setcond_i32(int cond, TCGv_i32 ret,
> +                                       TCGv_i32 arg1, TCGv_i32 arg2)
> +{
> +    tcg_gen_op4i_i32(INDEX_op_setcond_i32, ret, arg1, arg2, cond);
> +}
> +
> +static inline void tcg_gen_setcond_i64(int cond, TCGv_i64 ret,
> +                                       TCGv_i64 arg1, TCGv_i64 arg2)
> +{
> +#if TCG_TARGET_REG_BITS == 64
> +    tcg_gen_op4i_i64(INDEX_op_setcond_i64, ret, arg1, arg2, cond);
> +#else
> +    tcg_gen_op6i_i32(INDEX_op_setcond2_i32, TCGV_LOW(ret),
> +                     TCGV_LOW(arg1), TCGV_HIGH(arg1),
> +                     TCGV_LOW(arg2), TCGV_HIGH(arg2), cond);
> +    tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
> +#endif
> +}

I wonder if it wouldn't be better to let the back-ends emit the
clearing of TCGV_HIGH(ret).  This would reduce the number
of emitted TCG ops.  Any thoughts?


Laurent