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Date: Tue, 26 Jan 2010 17:27:27 +0100
Message-ID: <761ea48b1001260827y3fd1c292r6cbcb8740fe89bc6@mail.gmail.com>
Subject: Re: [Qemu-devel] [PATCH 4/5] linux-user: Add access to TLS registers
From: Laurent Desnogues <laurent.desnogues@gmail.com>
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To: Riku Voipio <riku.voipio@iki.fi>
Cc: Riku Voipio <riku.voipio@nokia.com>, qemu-devel@nongnu.org

On Tue, Jan 26, 2010 at 5:00 PM, Riku Voipio <riku.voipio@iki.fi> wrote:
> From: Riku Voipio <riku.voipio@nokia.com>
>
> If you compile applications with gcc -mtp=3Dcp15, __thread
> access's will generate an abort. Implement accessing allowed
> cp15.c13 registers on ARMv6K+ in linux-user.
>
> Signed-off-by: Riku Voipio <riku.voipio@nokia.com>
> ---
> =A0target-arm/helper.c | =A0 27 ++++++++++++++++++++++++++-
> =A01 files changed, 26 insertions(+), 1 deletions(-)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index b3aec99..68578ce 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -505,13 +505,38 @@ uint32_t HELPER(get_cp)(CPUState *env, uint32_t ins=
n)
>
> =A0void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val)
> =A0{
> + =A0 =A0int op2;
> +
> + =A0 =A0op2 =3D (insn >> 5) & 7;
> + =A0 =A0/* Allow write access to CP15 User RW Thread ID Register */
> + =A0 =A0if (arm_feature (env, ARM_FEATURE_V6K) && ((insn >> 16) & 0xf) =
=3D=3D 13) {
> + =A0 =A0 =A0 =A0switch (op2) {
> + =A0 =A0 =A0 =A0case 2:
> + =A0 =A0 =A0 =A0 =A0 =A0env->cp15.c13_tls1 =3D val;
> + =A0 =A0 =A0 =A0 =A0 =A0return;
> + =A0 =A0 =A0 =A0}
> + =A0 =A0}
> =A0 =A0 cpu_abort(env, "cp15 insn %08x\n", insn);
> =A0}
>
> =A0uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn)
> =A0{
> + =A0 =A0int op2;
> + =A0 =A0/* Allow read access to CP15 User RW and RO Thread ID Registers =
*/
> +
> + =A0 =A0op2 =3D (insn >> 5) & 7;
> + =A0 =A0if (arm_feature (env, ARM_FEATURE_V6K) && ((insn >> 16) & 0xf) =
=3D=3D 13) {
> + =A0 =A0 =A0 =A0switch (op2) {
> + =A0 =A0 =A0 =A0case 2:
> + =A0 =A0 =A0 =A0 =A0 =A0return env->cp15.c13_tls1;
> + =A0 =A0 =A0 =A0case 3:
> + =A0 =A0 =A0 =A0 =A0 =A0return env->cp15.c13_tls2;
> + =A0 =A0 =A0 =A0default:
> + =A0 =A0 =A0 =A0 =A0 =A0goto bad_reg;
> + =A0 =A0 =A0 =A0}
> + =A0 =A0}
> +bad_reg:
> =A0 =A0 cpu_abort(env, "cp15 insn %08x\n", insn);
> - =A0 =A0return 0;
> =A0}
>
> =A0/* These should probably raise undefined insn exceptions. =A0*/

Most of the checks you do here could be done in translate.c.
Wouldn't it be better to do them there?


Laurent