From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Luc Michel <luc@lmichel.fr>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org,
Andrew Baumann <Andrew.Baumann@microsoft.com>
Subject: Re: [PATCH 10/14] hw/misc/bcm2835_cprman: implement clock mux behaviour
Date: Sat, 26 Sep 2020 23:40:57 +0200 [thread overview]
Message-ID: <76aae8af-dff0-b76f-cf04-0e3231eaf2bb@amsat.org> (raw)
In-Reply-To: <20200925101731.2159827-11-luc@lmichel.fr>
On 9/25/20 12:17 PM, Luc Michel wrote:
> A clock mux can be configured to select one of its 10 sources through
> the cm_ctl register. It also embeds yet another clock divider, composed
> of an integer part and a fractionnal part. The number of bits of each
Typo "fractional".
> part is mux dependant.
Typo "dependent"?
>
> Signed-off-by: Luc Michel <luc@lmichel.fr>
> ---
> hw/misc/bcm2835_cprman.c | 43 +++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 42 insertions(+), 1 deletion(-)
>
> diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
> index 8df2db0fd9..75bc11939b 100644
> --- a/hw/misc/bcm2835_cprman.c
> +++ b/hw/misc/bcm2835_cprman.c
> @@ -229,19 +229,60 @@ static const TypeInfo cprman_pll_channel_info = {
> };
>
>
> /* clock mux */
>
> +static bool clock_mux_is_enabled(CprmanClockMuxState *mux)
> +{
> + return FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, ENABLE);
> +}
> +
> static void clock_mux_update(CprmanClockMuxState *mux)
> {
> - clock_update(mux->out, 0);
> + uint64_t freq, div;
> + uint32_t src = FIELD_EX32(*mux->reg_cm, CM_CLOCKx_CTL, SRC);
> + bool enabled = clock_mux_is_enabled(mux);
> +
> + *mux->reg_cm = FIELD_DP32(*mux->reg_cm, CM_CLOCKx_CTL, BUSY, enabled);
> +
> + if (!enabled) {
> + clock_update(mux->out, 0);
> + return;
> + }
> +
> + freq = clock_get_hz(mux->srcs[src]);
> +
> + if (mux->int_bits == 0 && mux->frac_bits == 0) {
> + clock_update_hz(mux->out, freq);
> + return;
> + }
> +
> + /*
> + * The divider has an integer and a fractional part. The size of each part
> + * varies with the muxes (int_bits and frac_bits). Both parts are
> + * concatenated, with the integer part always starting at bit 12.
> + */
> + div = mux->reg_cm[1] >> (R_CM_CLOCKx_DIV_FRAC_LENGTH - mux->frac_bits);
> + div &= (1 << (mux->int_bits + mux->frac_bits)) - 1;
> +
> + freq = (freq << mux->frac_bits) / div;
> +
> + clock_update_hz(mux->out, freq);
> }
>
> static void clock_mux_src_update(void *opaque)
> {
> CprmanClockMuxState **backref = opaque;
> CprmanClockMuxState *s = *backref;
> + CprmanClockMuxSource src = backref - s->backref;
> + uint32_t current_src;
> +
> + current_src = FIELD_EX32(*s->reg_cm, CM_CLOCKx_CTL, SRC);
> +
> + if (current_src != src) {
> + return;
> + }
>
> clock_mux_update(s);
> }
>
> static void clock_mux_init(Object *obj)
>
next prev parent reply other threads:[~2020-09-26 21:42 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-25 10:17 [PATCH 00/14] raspi: add the bcm2835 cprman clock manager Luc Michel
2020-09-25 10:17 ` [PATCH 01/14] hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro Luc Michel
2020-09-26 20:36 ` Philippe Mathieu-Daudé
2020-09-28 8:38 ` Damien Hedde
2020-09-25 10:17 ` [PATCH 02/14] hw/core/clock: trace clock values in Hz instead of ns Luc Michel
2020-09-26 20:36 ` Philippe Mathieu-Daudé
2020-09-28 8:42 ` Damien Hedde
2020-09-25 10:17 ` [PATCH 03/14] hw/arm/raspi: fix cprman base address Luc Michel
2020-09-26 21:04 ` Philippe Mathieu-Daudé
2020-09-25 10:17 ` [PATCH 04/14] hw/arm/raspi: add a skeleton implementation of the cprman Luc Michel
2020-09-26 21:05 ` Philippe Mathieu-Daudé
2020-09-28 8:45 ` Luc Michel
2020-10-02 14:37 ` Philippe Mathieu-Daudé
2020-10-03 11:54 ` Luc Michel
2020-10-03 18:14 ` Philippe Mathieu-Daudé
2020-09-25 10:17 ` [PATCH 05/14] hw/misc/bcm2835_cprman: add a PLL skeleton implementation Luc Michel
2020-09-26 21:17 ` Philippe Mathieu-Daudé
2020-09-25 10:17 ` [PATCH 06/14] hw/misc/bcm2835_cprman: implement PLLs behaviour Luc Michel
2020-09-26 21:26 ` Philippe Mathieu-Daudé
2020-09-25 10:17 ` [PATCH 07/14] hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation Luc Michel
2020-09-26 21:32 ` Philippe Mathieu-Daudé
2020-09-25 10:17 ` [PATCH 08/14] hw/misc/bcm2835_cprman: implement PLL channels behaviour Luc Michel
2020-09-26 21:36 ` Philippe Mathieu-Daudé
2020-09-25 10:17 ` [PATCH 09/14] hw/misc/bcm2835_cprman: add a clock mux skeleton implementation Luc Michel
2020-10-02 14:42 ` Philippe Mathieu-Daudé
2020-10-02 15:34 ` Philippe Mathieu-Daudé
2020-10-04 19:34 ` Luc Michel
2020-10-04 20:17 ` Philippe Mathieu-Daudé
2020-09-25 10:17 ` [PATCH 10/14] hw/misc/bcm2835_cprman: implement clock mux behaviour Luc Michel
2020-09-26 21:40 ` Philippe Mathieu-Daudé [this message]
2020-10-02 14:51 ` Philippe Mathieu-Daudé
2020-10-04 18:37 ` Luc Michel
2020-10-05 19:50 ` Luc Michel
2020-09-25 10:17 ` [PATCH 11/14] hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer Luc Michel
2020-10-02 14:55 ` Philippe Mathieu-Daudé
2020-09-25 10:17 ` [PATCH 12/14] hw/misc/bcm2835_cprman: add sane reset values to the registers Luc Michel
2020-09-25 10:17 ` [RFC PATCH 13/14] hw/char/pl011: add a clock input Luc Michel
2020-09-25 10:36 ` Philippe Mathieu-Daudé
2020-09-25 10:17 ` [RFC PATCH 14/14] hw/arm/bcm2835_peripherals: connect the UART clock Luc Michel
2020-09-25 11:56 ` [PATCH 00/14] raspi: add the bcm2835 cprman clock manager no-reply
2020-09-25 12:55 ` Philippe Mathieu-Daudé
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