Re: [PATCH] target/arm: Implement SVE2 fp multiply-add long

[Richard Henderson <richard.henderson@linaro.org>]

On 5/4/20 10:12 AM, Stephen Long wrote:
> +void HELPER(sve2_fmlal_zzzw_s)(void *vd, void *vn, void *vm, void *va,
> +                               void *status, uint32_t desc)
> +{
> +    intptr_t i, opr_sz = simd_oprsz(desc);
> +    intptr_t sel1 = simd_data(desc) * sizeof(float16);
> +    for (i = 0; i < opr_sz; i += sizeof(float32)) {
> +        float16 nn_16 = *(float16 *)(vn + H1_2(i + sel1));
> +        float16 mm_16 = *(float16 *)(vm + H1_2(i + sel1));
> +
> +        float32 nn = float16_to_float32(nn_16, true, status);
> +        float32 mm = float16_to_float32(mm_16, true, status);
> +        float32 aa = *(float32 *)(va + H1_4(i));
> +        *(float32 *)(vd + H1_4(i)) = float32_muladd(nn, mm, aa, 0, status);
> +    }
> +}

This isn't quite right.  The float16 to float32 conversion cannot raise any
exceptions -- this is an exact operation.

We already have an implementation of this function in vec_helper.c --
float16_to_float32_by_bits, used by the AdvSIMD version of this same operation.

I've rearranged the helpers to match AdvSIMD, and queued the patch.


r~