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[174.21.143.238]) by smtp.gmail.com with ESMTPSA id n19sm165562pgb.0.2020.06.17.21.05.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 17 Jun 2020 21:05:47 -0700 (PDT) Subject: Re: [PATCH] target/arm: Implement SVE2 fp multiply-add long To: Stephen Long , qemu-devel@nongnu.org References: <20200504171240.11220-1-steplong@quicinc.com> From: Richard Henderson Message-ID: <76ea3eb3-4139-0268-9e5d-ccd4ee6deb1d@linaro.org> Date: Wed, 17 Jun 2020 21:05:45 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <20200504171240.11220-1-steplong@quicinc.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::641; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x641.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, apazos@quicinc.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 5/4/20 10:12 AM, Stephen Long wrote: > +void HELPER(sve2_fmlal_zzzw_s)(void *vd, void *vn, void *vm, void *va, > + void *status, uint32_t desc) > +{ > + intptr_t i, opr_sz = simd_oprsz(desc); > + intptr_t sel1 = simd_data(desc) * sizeof(float16); > + for (i = 0; i < opr_sz; i += sizeof(float32)) { > + float16 nn_16 = *(float16 *)(vn + H1_2(i + sel1)); > + float16 mm_16 = *(float16 *)(vm + H1_2(i + sel1)); > + > + float32 nn = float16_to_float32(nn_16, true, status); > + float32 mm = float16_to_float32(mm_16, true, status); > + float32 aa = *(float32 *)(va + H1_4(i)); > + *(float32 *)(vd + H1_4(i)) = float32_muladd(nn, mm, aa, 0, status); > + } > +} This isn't quite right. The float16 to float32 conversion cannot raise any exceptions -- this is an exact operation. We already have an implementation of this function in vec_helper.c -- float16_to_float32_by_bits, used by the AdvSIMD version of this same operation. I've rearranged the helpers to match AdvSIMD, and queued the patch. r~