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([2804:431:c7c7:f4d8:aa07:335f:99e0:a6e7]) by smtp.gmail.com with ESMTPSA id p67sm26984719qkf.49.2022.01.04.01.56.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 04 Jan 2022 01:56:45 -0800 (PST) Message-ID: <770d6df3-dff1-84b7-f6db-09f9458f6261@gmail.com> Date: Tue, 4 Jan 2022 06:56:42 -0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.4.0 Subject: Re: [PATCH v2 00/19] ppc/pnv: Add support for user created PHB3/PHB4 devices Content-Language: en-US To: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , qemu-ppc@nongnu.org, qemu-devel@nongnu.org References: <20211213132830.108372-1-clg@kaod.org> <8cc4ad78-48e9-5e01-cae8-d89f9ee8a3a1@kaod.org> From: Daniel Henrique Barboza In-Reply-To: <8cc4ad78-48e9-5e01-cae8-d89f9ee8a3a1@kaod.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::f35 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::f35; envelope-from=danielhb413@gmail.com; helo=mail-qv1-xf35.google.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, NICE_REPLY_A=-3.354, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Frederic Barrat , Greg Kurz Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/15/21 13:56, Cédric Le Goater wrote: > On 12/13/21 14:28, Cédric Le Goater wrote: >> Hello, >> >> On the POWER8 processor, powernv8 machine, PHB3 devices can simply be >> created with : >> >>     -device pnv-phb3,chip-id=0,index=1 >> >> with a maximum of 3 PHB3s per chip, each PHB3 adding a new PCIe bus. >> >> On the POWER9 processor, powernv9 machine, the logic is different. The >> the chip comes with 3 PHB4 PECs (PCI Express Controller) and each PEC >> can have several PHBs : >> >>    * PEC0 provides 1 PHB  (PHB0) >>    * PEC1 provides 2 PHBs (PHB1 and PHB2) >>    * PEC2 provides 3 PHBs (PHB3, PHB4 and PHB5) >> >> The PEC devices can be created with : >> >>     -device pnv-phb4-pec,chip-id=0,index=1 >> >> And the number of added PHB4 devices depends on the PEC index. Each >> PHB4 adds a new PCIe bus. >> >> The following changes are mostly cleanups and improvements of the >> PHB3/4 realize routines to enable support. One important change is >> related to the way the powernv machine populates the device tree. It >> depends on the object hierarchy and it is necessary to reparent user >> created devices to the chip they belong to (see PATCH 5). PHB3 is a >> little more sophisticated because of its SysBusDevice nature (see >> PATCH 6). >> >> It would be preferable for libvirt and user to add one PHB4 (one PCIe >> bus) at a time but that's another step. The plan is to merge real soon >> the first patches which are required cleanups of the models and give >> some more time for the last ones. > > Applied patches 1-14 which are simple cleanups to ppc-next. Did you also push patches 15-19? Or these were the ones that you decided to discard? Thanks, Daniel > > Thanks, > > C.