Re: [Qemu-devel] [PATCH v1 1/8] target/avr: Add instruction decoder

[Richard Henderson <richard.henderson@linaro.org>]

On 5/4/19 1:36 AM, Sarah Harris wrote:
> This utility module builds a decision tree to decode instructions, starting from a human readable list of instruction bit patterns.
> Automatic tree generation will hopefully be more efficient and more maintainable than a hand-designed opcode parser.
> 
> Tree generation happens at startup because this seemed simpler to implement than adding a new build step.

We have such a thing in qemu already, as a separate build step.

See ./scripts/decodetree.py, and some of the uses in

  target/{arm,hppa,riscv}/*.decode

In addition to being able to select the instruction, it also
extracts arguments from the instruction, so there's less
repetition that you have for e.g.

 > +static inline uint32_t MOVW_Rr(uint32_t opcode)
> +{
> +    return extract32(opcode, 0, 4);
> +}
...
> +static inline uint32_t MULS_Rr(uint32_t opcode)
> +{
> +    return extract32(opcode, 0, 4);
> +}


r~