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[176.184.20.254]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d2920313sm112804515e9.0.2024.07.22.05.20.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 22 Jul 2024 05:20:41 -0700 (PDT) Message-ID: <778e6f3e-c4ec-4bef-a936-7dc9d8d5316c@linaro.org> Date: Mon, 22 Jul 2024 14:20:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] util/fifo8: Introduce fifo8_change_capacity() To: Peter Maydell Cc: Mark Cave-Ayland , qemu-devel@nongnu.org, Paolo Bonzini , =?UTF-8?Q?Alex_Benn=C3=A9e?= , =?UTF-8?Q?Marc-Andr=C3=A9_Lureau?= References: <20240719151628.46253-1-philmd@linaro.org> <20240719151628.46253-4-philmd@linaro.org> <69df9510-1b1a-434e-bbbe-1df7acf49f58@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 22/7/24 13:52, Peter Maydell wrote: > On Mon, 22 Jul 2024 at 11:56, Philippe Mathieu-Daudé wrote: >> >> On 19/7/24 22:21, Mark Cave-Ayland wrote: >>> On 19/07/2024 16:16, Philippe Mathieu-Daudé wrote: >>> >>>> FIFOs can be resized at runtime. Introduce the >>>> fifo8_change_capacity() method to do that. >>>> When capacity is changed, the FIFO must be reset. >>>> >>>> Signed-off-by: Philippe Mathieu-Daudé >>>> --- >>>> include/qemu/fifo8.h | 10 ++++++++++ >>>> util/fifo8.c | 7 +++++++ >>>> 2 files changed, 17 insertions(+) >>>> >>>> diff --git a/include/qemu/fifo8.h b/include/qemu/fifo8.h >>>> index c6295c6ff0..9fe0555a24 100644 >>>> --- a/include/qemu/fifo8.h >>>> +++ b/include/qemu/fifo8.h >>>> @@ -31,6 +31,16 @@ void fifo8_create(Fifo8 *fifo, uint32_t capacity); >>>> void fifo8_destroy(Fifo8 *fifo); >>>> +/** >>>> + * fifo8_change_capacity: >>>> + * @fifo: struct Fifo8 to change the capacity >>>> + * @capacity: new capacity of the FIFO >>>> + * >>>> + * Change a FIFO capacity to the specified size. The FIFO is reset. >>>> + */ >>>> + >>>> +void fifo8_change_capacity(Fifo8 *fifo, uint32_t capacity); >>>> + >>>> /** >>>> * fifo8_push: >>>> * @fifo: FIFO to push to >>>> diff --git a/util/fifo8.c b/util/fifo8.c >>>> index 2925fe5611..c453afd774 100644 >>>> --- a/util/fifo8.c >>>> +++ b/util/fifo8.c >>>> @@ -34,6 +34,13 @@ void fifo8_destroy(Fifo8 *fifo) >>>> g_free(fifo->data); >>>> } >>>> +void fifo8_change_capacity(Fifo8 *fifo, uint32_t capacity) >>>> +{ >>>> + fifo->data = g_renew(uint8_t, fifo->data, capacity); >>>> + fifo->capacity = capacity; >>>> + fifo8_reset(fifo); >>>> +} >>>> + >>>> void fifo8_push(Fifo8 *fifo, uint8_t data) >>>> { >>>> assert(fifo->num < fifo->capacity); >>> >>> The changes look okay, however I'm a little confused as to why this is >>> needed as generally hardware FIFOs are a fixed size? Presumably this is >>> related to the PL011 series? >> >> Indeed, this is to model trying to stay as close as possible to >> the datasheet, which states: >> >> 2.4.3 UART operation >> >> Disabling the FIFOs >> >> Additionally, you can disable the FIFOs. In this case, >> the transmit and receive sides of the UART have 1-byte >> holding registers (the bottom entry of the FIFOs). The >> overrun bit is set when a word has been received, and >> the previous one was not yet read. In this implementation, >> the FIFOs are not physically disabled, but the flags are >> manipulated to give the illusion of a 1-byte register. > > Notice that in the hardware we don't actually resize the FIFO, > though -- we just only ever keep one element in it... Yes. IIUC Mark's comment in the PL011 series, we don't need this (confusing) method at all: https://lore.kernel.org/qemu-devel/4e6b616f-3acc-4130-9b92-1af7fed540da@ilande.co.uk/