From: Richard Henderson <richard.henderson@linaro.org>
To: Hesham Almatary <Hesham.Almatary@cl.cam.ac.uk>, qemu-riscv@nongnu.org
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Palmer Dabbelt <palmer@sifive.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
qemu-devel@nongnu.org,
Sagar Karandikar <sagark@eecs.berkeley.edu>
Subject: Re: [Qemu-devel] [PATCHv4 3/6] RISC-V: Check for the effective memory privilege mode during PMP checks
Date: Thu, 27 Jun 2019 19:00:53 +0200 [thread overview]
Message-ID: <77c4044f-93dc-0608-496e-edf8bd8f77d7@linaro.org> (raw)
In-Reply-To: <20190627121828.8376-3-Hesham.Almatary@cl.cam.ac.uk>
On 6/27/19 2:18 PM, Hesham Almatary wrote:
> @@ -392,19 +392,27 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> int prot;
> bool pmp_violation = false;
> int ret = TRANSLATE_FAIL;
> + int mode = mmu_idx;
>
> qemu_log_mask(CPU_LOG_MMU, "%s ad %" VADDR_PRIx " rw %d mmu_idx %d\n",
> __func__, address, access_type, mmu_idx);
>
> ret = get_physical_address(env, &pa, &prot, address, access_type, mmu_idx);
>
> + if (mode == PRV_M && access_type != MMU_INST_FETCH) {
> + if (get_field(env->mstatus, MSTATUS_MPRV)) {
> + mode = get_field(env->mstatus, MSTATUS_MPP);
> + }
> + }
This hunk looks like it belongs in riscv_cpu_mmu_index instead.
Passing the (corrected) mmu_idx on to pmp_hart_has_privs looks right.
r~
next prev parent reply other threads:[~2019-06-27 17:08 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-27 12:18 [Qemu-devel] [PATCHv4 1/6] RISC-V: Only Check PMP if MMU translation succeeds Hesham Almatary
2019-06-27 12:18 ` [Qemu-devel] [PATCHv4 2/6] RISC-V: Raise access fault exceptions on PMP violations Hesham Almatary
2019-06-27 12:18 ` [Qemu-devel] [PATCHv4 3/6] RISC-V: Check for the effective memory privilege mode during PMP checks Hesham Almatary
2019-06-27 17:00 ` Richard Henderson [this message]
2019-06-27 12:18 ` [Qemu-devel] [PATCHv4 4/6] RISC-V: Check PMP during Page Table Walks Hesham Almatary
2019-06-27 12:18 ` [Qemu-devel] [PATCHv4 5/6] RISC-V: Fix a PMP bug where it succeeds even if PMP entry is off Hesham Almatary
2019-06-27 12:18 ` [Qemu-devel] [PATCHv4 6/6] RISC-V: Fix a PMP check with the correct access size Hesham Almatary
-- strict thread matches above, loose matches on Subject: below --
2019-05-30 13:51 [Qemu-devel] [PATCHv4 1/6] RISC-V: Only Check PMP if MMU translation succeeds Hesham Almatary
2019-05-30 13:51 ` [Qemu-devel] [PATCHv4 3/6] RISC-V: Check for the effective memory privilege mode during PMP checks Hesham Almatary
2019-06-05 21:02 ` Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=77c4044f-93dc-0608-496e-edf8bd8f77d7@linaro.org \
--to=richard.henderson@linaro.org \
--cc=Alistair.Francis@wdc.com \
--cc=Hesham.Almatary@cl.cam.ac.uk \
--cc=kbastian@mail.uni-paderborn.de \
--cc=palmer@sifive.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=sagark@eecs.berkeley.edu \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).