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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42b53f1fd50sm32357869f8f.38.2025.11.18.06.16.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Nov 2025 06:16:31 -0800 (PST) Message-ID: <77d7afeb-3dbc-4fcf-976b-09fe01cf542e@linaro.org> Date: Tue, 18 Nov 2025 15:16:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 2/4] hw/misc/pvpanic: add PCI interface support Content-Language: en-US To: Mihai Carabas , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, yvugenfi@redhat.com, kraxel@redhat.com, Paolo Bonzini , Richard Henderson References: <1611759570-3645-1-git-send-email-mihai.carabas@oracle.com> <1611759570-3645-3-git-send-email-mihai.carabas@oracle.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <1611759570-3645-3-git-send-email-mihai.carabas@oracle.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi, (old patch merged as commit d097b3dcb62) On 27/1/21 15:59, Mihai Carabas wrote: > Add PCI interface support for PVPANIC device. Create a new file pvpanic-pci.c > where the PCI specific routines reside and update the build system with the new > files and config structure. > > Signed-off-by: Mihai Carabas > Reviewed-by: Gerd Hoffmann > Reviewed-by: Peter Maydell > Signed-off-by: Mihai Carabas > --- > docs/specs/pci-ids.txt | 1 + > hw/misc/Kconfig | 6 +++ > hw/misc/meson.build | 1 + > hw/misc/pvpanic-pci.c | 94 +++++++++++++++++++++++++++++++++++++++++++++++ > include/hw/misc/pvpanic.h | 1 + > include/hw/pci/pci.h | 1 + > 6 files changed, 104 insertions(+) > create mode 100644 hw/misc/pvpanic-pci.c > > diff --git a/docs/specs/pci-ids.txt b/docs/specs/pci-ids.txt > index abbdbca..5e407a6 100644 > --- a/docs/specs/pci-ids.txt > +++ b/docs/specs/pci-ids.txt > @@ -64,6 +64,7 @@ PCI devices (other than virtio): > 1b36:000d PCI xhci usb host adapter > 1b36:000f mdpy (mdev sample device), linux/samples/vfio-mdev/mdpy.c > 1b36:0010 PCIe NVMe device (-device nvme) > +1b36:0011 PCI PVPanic device (-device pvpanic-pci) > > All these devices are documented in docs/specs. > > diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig > index 23bc978..19c216f 100644 > --- a/hw/misc/Kconfig > +++ b/hw/misc/Kconfig > @@ -124,6 +124,12 @@ config IOTKIT_SYSINFO > config PVPANIC_COMMON > bool > > +config PVPANIC_PCI > + bool > + default y if PCI_DEVICES > + depends on PCI > + select PVPANIC_COMMON > + > config PVPANIC_ISA > bool > depends on ISA_BUS > diff --git a/hw/misc/meson.build b/hw/misc/meson.build > index edaaec2..6292839 100644 > --- a/hw/misc/meson.build > +++ b/hw/misc/meson.build > @@ -100,6 +100,7 @@ softmmu_ss.add(when: 'CONFIG_ARMSSE_CPUID', if_true: files('armsse-cpuid.c')) > softmmu_ss.add(when: 'CONFIG_ARMSSE_MHU', if_true: files('armsse-mhu.c')) > > softmmu_ss.add(when: 'CONFIG_PVPANIC_ISA', if_true: files('pvpanic-isa.c')) > +softmmu_ss.add(when: 'CONFIG_PVPANIC_PCI', if_true: files('pvpanic-pci.c')) > softmmu_ss.add(when: 'CONFIG_AUX', if_true: files('auxbus.c')) > softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_scu.c', 'aspeed_sdmc.c', 'aspeed_xdma.c')) > softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-sysreg.c')) > diff --git a/hw/misc/pvpanic-pci.c b/hw/misc/pvpanic-pci.c > new file mode 100644 > index 0000000..d629639 > --- /dev/null > +++ b/hw/misc/pvpanic-pci.c > @@ -0,0 +1,94 @@ > +/* > + * QEMU simulated PCI pvpanic device. > + * > + * Copyright (C) 2020 Oracle > + * > + * Authors: > + * Mihai Carabas > + * > + * This work is licensed under the terms of the GNU GPL, version 2 or later. > + * See the COPYING file in the top-level directory. > + * > + */ > + > +#include "qemu/osdep.h" > +#include "qemu/log.h" > +#include "qemu/module.h" > +#include "sysemu/runstate.h" > + > +#include "hw/nvram/fw_cfg.h" > +#include "hw/qdev-properties.h" > +#include "migration/vmstate.h" > +#include "hw/misc/pvpanic.h" > +#include "qom/object.h" > +#include "hw/pci/pci.h" > + > +OBJECT_DECLARE_SIMPLE_TYPE(PVPanicPCIState, PVPANIC_PCI_DEVICE) > + > +/* > + * PVPanicPCIState for PCI device > + */ > +typedef struct PVPanicPCIState { > + PCIDevice dev; > + PVPanicState pvpanic; > +} PVPanicPCIState; > + > +static const VMStateDescription vmstate_pvpanic_pci = { > + .name = "pvpanic-pci", > + .version_id = 1, > + .minimum_version_id = 1, > + .fields = (VMStateField[]) { > + VMSTATE_PCI_DEVICE(dev, PVPanicPCIState), > + VMSTATE_END_OF_LIST() > + } > +}; > + > +static void pvpanic_pci_realizefn(PCIDevice *dev, Error **errp) > +{ > + PVPanicPCIState *s = PVPANIC_PCI_DEVICE(dev); > + PVPanicState *ps = &s->pvpanic; > + > + pvpanic_setup_io(&s->pvpanic, DEVICE(s), 2); Why registering 2-bytes of I/O when the underlying device is 1-byte wide? Is this to allow 16-bit I/O instructions? > + > + pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &ps->mr); > +} > + > +static Property pvpanic_pci_properties[] = { > + DEFINE_PROP_UINT8("events", PVPanicPCIState, pvpanic.events, PVPANIC_PANICKED | PVPANIC_CRASHLOADED), > + DEFINE_PROP_END_OF_LIST(), > +}; > + > +static void pvpanic_pci_class_init(ObjectClass *klass, void *data) > +{ > + DeviceClass *dc = DEVICE_CLASS(klass); > + PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass); > + > + device_class_set_props(dc, pvpanic_pci_properties); > + > + pc->realize = pvpanic_pci_realizefn; > + pc->vendor_id = PCI_VENDOR_ID_REDHAT; > + pc->device_id = PCI_DEVICE_ID_REDHAT_PVPANIC; > + pc->revision = 1; > + pc->class_id = PCI_CLASS_SYSTEM_OTHER; > + dc->vmsd = &vmstate_pvpanic_pci; > + > + set_bit(DEVICE_CATEGORY_MISC, dc->categories); > +} > + > +static TypeInfo pvpanic_pci_info = { > + .name = TYPE_PVPANIC_PCI_DEVICE, > + .parent = TYPE_PCI_DEVICE, > + .instance_size = sizeof(PVPanicPCIState), > + .class_init = pvpanic_pci_class_init, > + .interfaces = (InterfaceInfo[]) { > + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, > + { } > + } > +}; > + > +static void pvpanic_register_types(void) > +{ > + type_register_static(&pvpanic_pci_info); > +} > + > +type_init(pvpanic_register_types); > diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h > index abc9dde..ca3c5bb 100644 > --- a/include/hw/misc/pvpanic.h > +++ b/include/hw/misc/pvpanic.h > @@ -18,6 +18,7 @@ > #include "qom/object.h" > > #define TYPE_PVPANIC_ISA_DEVICE "pvpanic" > +#define TYPE_PVPANIC_PCI_DEVICE "pvpanic-pci" > > #define PVPANIC_IOPORT_PROP "ioport" > > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h > index 259f9c9..66db084 100644 > --- a/include/hw/pci/pci.h > +++ b/include/hw/pci/pci.h > @@ -107,6 +107,7 @@ extern bool pci_available; > #define PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE 0x000e > #define PCI_DEVICE_ID_REDHAT_MDPY 0x000f > #define PCI_DEVICE_ID_REDHAT_NVME 0x0010 > +#define PCI_DEVICE_ID_REDHAT_PVPANIC 0x0011 > #define PCI_DEVICE_ID_REDHAT_QXL 0x0100 > > #define FMT_PCIBUS PRIx64