From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 5/6] hw/timer/armv7m_systick: Forbid non-privileged accesses
Date: Tue, 18 Jun 2019 07:05:27 +0200 [thread overview]
Message-ID: <7803c62a-c574-cefd-02b4-41df08dca085@redhat.com> (raw)
In-Reply-To: <20190617175317.27557-6-peter.maydell@linaro.org>
On 6/17/19 7:53 PM, Peter Maydell wrote:
> Like most of the v7M memory mapped system registers, the systick
> registers are accessible to privileged code only and user accesses
> must generate a BusFault. We implement that for registers in
> the NVIC proper already, but missed it for systick since we
> implement it as a separate device. Correct the omission.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> hw/timer/armv7m_systick.c | 26 ++++++++++++++++++++------
> 1 file changed, 20 insertions(+), 6 deletions(-)
>
> diff --git a/hw/timer/armv7m_systick.c b/hw/timer/armv7m_systick.c
> index a17317ce2fe..94640743b5d 100644
> --- a/hw/timer/armv7m_systick.c
> +++ b/hw/timer/armv7m_systick.c
> @@ -75,11 +75,17 @@ static void systick_timer_tick(void *opaque)
> }
> }
>
> -static uint64_t systick_read(void *opaque, hwaddr addr, unsigned size)
> +static MemTxResult systick_read(void *opaque, hwaddr addr, uint64_t *data,
> + unsigned size, MemTxAttrs attrs)
> {
> SysTickState *s = opaque;
> uint32_t val;
>
> + if (attrs.user) {
> + /* Generate BusFault for unprivileged accesses */
> + return MEMTX_ERROR;
> + }
> +
> switch (addr) {
> case 0x0: /* SysTick Control and Status. */
> val = s->control;
> @@ -121,14 +127,21 @@ static uint64_t systick_read(void *opaque, hwaddr addr, unsigned size)
> }
>
> trace_systick_read(addr, val, size);
> - return val;
> + *data = val;
> + return MEMTX_OK;
> }
>
> -static void systick_write(void *opaque, hwaddr addr,
> - uint64_t value, unsigned size)
> +static MemTxResult systick_write(void *opaque, hwaddr addr,
> + uint64_t value, unsigned size,
> + MemTxAttrs attrs)
> {
> SysTickState *s = opaque;
>
> + if (attrs.user) {
> + /* Generate BusFault for unprivileged accesses */
> + return MEMTX_ERROR;
> + }
> +
> trace_systick_write(addr, value, size);
>
> switch (addr) {
> @@ -172,11 +185,12 @@ static void systick_write(void *opaque, hwaddr addr,
> qemu_log_mask(LOG_GUEST_ERROR,
> "SysTick: Bad write offset 0x%" HWADDR_PRIx "\n", addr);
> }
> + return MEMTX_OK;
> }
>
> static const MemoryRegionOps systick_ops = {
> - .read = systick_read,
> - .write = systick_write,
> + .read_with_attrs = systick_read,
> + .write_with_attrs = systick_write,
> .endianness = DEVICE_NATIVE_ENDIAN,
> .valid.min_access_size = 4,
> .valid.max_access_size = 4,
>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
next prev parent reply other threads:[~2019-06-18 5:07 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-17 17:53 [Qemu-devel] [PATCH 0/6] Six minor M-profile bugfixes Peter Maydell
2019-06-17 17:53 ` [Qemu-devel] [PATCH 1/6] target/arm: NS BusFault on vector table fetch escalates to NS HardFault Peter Maydell
2019-06-17 19:28 ` Richard Henderson
2019-06-18 10:31 ` Peter Maydell
2019-06-17 17:53 ` [Qemu-devel] [PATCH 2/6] arm v8M: Forcibly clear negative-priority exceptions on deactivate Peter Maydell
2019-06-17 19:39 ` Richard Henderson
2019-06-17 17:53 ` [Qemu-devel] [PATCH 3/6] target/arm: v8M: Check state of exception being returned from Peter Maydell
2019-06-17 19:58 ` Richard Henderson
2019-06-17 17:53 ` [Qemu-devel] [PATCH 4/6] target/arm: Use _ra versions of cpu_stl_data() in v7M helpers Peter Maydell
2019-06-17 20:01 ` Richard Henderson
2019-06-17 17:53 ` [Qemu-devel] [PATCH 5/6] hw/timer/armv7m_systick: Forbid non-privileged accesses Peter Maydell
2019-06-17 20:03 ` Richard Henderson
2019-06-18 5:05 ` Philippe Mathieu-Daudé [this message]
2019-06-17 17:53 ` [Qemu-devel] [PATCH 6/6] target/arm: Execute Thumb instructions when their condbits are 0xf Peter Maydell
2019-06-17 20:04 ` Richard Henderson
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