From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Siarhei Volkau <lis8215@gmail.com>, qemu-devel@nongnu.org
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
Aurelien Jarno <aurelien@aurel32.net>,
Stefan Markovic <smarkovic@wavecomp.com>,
Aleksandar Markovic <amarkovic@wavecomp.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: Re: [PATCH 00/33] target/mips: Finalise the Ingenic MXU ASE support
Date: Mon, 10 Jul 2023 21:28:16 +0200 [thread overview]
Message-ID: <781894e9-2565-b54f-8df3-9cbd1cf68e2a@linaro.org> (raw)
In-Reply-To: <20230608104222.1520143-1-lis8215@gmail.com>
Hi Siarhei,
On 8/6/23 12:41, Siarhei Volkau wrote:
> This patch series is aimed to add complete support of the
> Ingenic MXU extensions of version 1 revision 2.
> The serie doesn't split revision 1 and revision 2 of the
> MXU ASE as it ought to be, because I have no hardware which
> supports revision 1 only. The MXU version 2 is not the subject
> of the patch series either.
>
> All added/fixed instructions were tested on real hardware
> via set of fuzz tests written for that purpose, although
> the tests aren't subject of this patch series.
Thank you very much for your contribution.
This is a bit unfortunate that you did'nt implemented these
opcode using decodetree.
Also various opcodes are not well optimized, and would benefit
from using the TCG gvec API.
I imagine you have been rebasing that for some years now, so I'm
queuing as is to mips-next.
I hope you can share the tests so your work doesn't bitrot
with time (in particular when a good soul converts it to
decodetree).
Regards,
Phil.
next prev parent reply other threads:[~2023-07-10 19:29 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-08 10:41 [PATCH 00/33] target/mips: Finalise the Ingenic MXU ASE support Siarhei Volkau
2023-06-08 10:41 ` [PATCH 01/33] target/mips: Add emulation of MXU instructions for 32-bit load/store Siarhei Volkau
2023-06-08 10:41 ` [PATCH 02/33] Add support of two XBurst CPUs Siarhei Volkau
2023-06-08 10:41 ` [PATCH 03/33] target/mips: Add emulation of LXW LXB LXH LXBU LXHU instructions Siarhei Volkau
2023-06-08 10:41 ` [PATCH 04/33] target/mips: Add emulation of S32MADD/MADDU/MSUB/MSUBU instructions Siarhei Volkau
2023-06-08 10:41 ` [PATCH 05/33] target/mips: Add emulation of Q8SLT Q8SLTU instructions Siarhei Volkau
2023-06-08 10:41 ` [PATCH 06/33] target/mips: fix MXU D16MAX D16MIN Q8MAX Q8MIN instructions Siarhei Volkau
2023-06-08 10:41 ` [PATCH 07/33] target/mips: Add emulation of MXU S32SLT D16SLT D16AVG[R] Q8AVG[R] insns Siarhei Volkau
2023-06-08 10:41 ` [PATCH 08/33] target/mips: Add emulation of Q8ADD instruction Siarhei Volkau
2023-06-08 10:41 ` [PATCH 09/33] target/mips: Add emulation of MXU S32CPS D16CPS Q8ABD Q16SAT insns Siarhei Volkau
2023-06-08 10:41 ` [PATCH 10/33] target/mips: Add emulation of MXU D16MULF D16MULE instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 11/33] target/mips: Add emulation of MXU D16MACF D16MACE instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 12/33] target/mips: Add emulation of MXU D16MADL instruction Siarhei Volkau
2023-06-08 10:42 ` [PATCH 13/33] target/mips: Add emulation of MXU S16MAD instruction Siarhei Volkau
2023-06-08 10:42 ` [PATCH 14/33] target/mips: Add emulation of MXU Q16ADD instruction Siarhei Volkau
2023-06-08 10:42 ` [PATCH 15/33] target/mips: Add emulation of MXU D32ADD instruction Siarhei Volkau
2023-06-08 10:42 ` [PATCH 16/33] target/mips: Add emulation of MXU D32ACC D32ACCM D32ASUM instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 17/33] target/mips: Add emulation of MXU D32ADDC instruction Siarhei Volkau
2023-06-08 10:42 ` [PATCH 18/33] target/mips: Add emulation of MXU Q16ACC Q16ACCM D16ASUM instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 19/33] target/mips: Add emulation of MXU Q8ADDE Q8ACCE D8SUM D8SUMC instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 20/33] target/mips: Add emulation of MXU S8STD S8LDI S8SDI instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 21/33] target/mips: Add emulation of MXU S16LDD S16STD S16LDI S16SDI instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 22/33] target/mips: Add emulation of MXU S32MUL S32MULU S32EXTR S32EXTRV insns Siarhei Volkau
2023-06-08 10:42 ` [PATCH 23/33] target/mips: Add emulation of MXU S32ALN S32LUI insns Siarhei Volkau
2023-06-08 10:42 ` [PATCH 24/33] target/mips: Add emulation of MXU D32SARL D32SARW instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 25/33] target/mips: Add emulation of MXU D32SLL D32SLR D32SAR instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 26/33] target/mips: Add emulation of MXU Q16SLL Q16SLR Q16SAR instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 27/33] target/mips: Add emulation of MXU D32/Q16- SLLV/SLRV/SARV instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 28/33] target/mips: Add emulation of MXU S32/D16/Q8- MOVZ/MOVN instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 29/33] target/mips: Add emulation of MXU Q8MAC Q8MACSU instructions Siarhei Volkau
2023-06-08 10:42 ` [PATCH 30/33] target/mips: Add emulation of MXU Q16SCOP instruction Siarhei Volkau
2023-06-08 10:42 ` [PATCH 31/33] target/mips: Add emulation of MXU Q8MADL instruction Siarhei Volkau
2023-06-08 10:42 ` [PATCH 32/33] target/mips: Add emulation of MXU S32SFL instruction Siarhei Volkau
2023-06-08 10:42 ` [PATCH 33/33] target/mips: Add emulation of MXU Q8SAD instruction Siarhei Volkau
2023-07-10 19:28 ` Philippe Mathieu-Daudé [this message]
2023-07-20 16:12 ` [PATCH 00/33] target/mips: Finalise the Ingenic MXU ASE support Siarhei Volkau
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