From: Yi Liu <yi.l.liu@intel.com>
To: "Duan, Zhenzhong" <zhenzhong.duan@intel.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "alex.williamson@redhat.com" <alex.williamson@redhat.com>,
"clg@redhat.com" <clg@redhat.com>,
"eric.auger@redhat.com" <eric.auger@redhat.com>,
"mst@redhat.com" <mst@redhat.com>,
"peterx@redhat.com" <peterx@redhat.com>,
"jasowang@redhat.com" <jasowang@redhat.com>,
"jgg@nvidia.com" <jgg@nvidia.com>,
"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"clement.mathieu--drif@eviden.com"
<clement.mathieu--drif@eviden.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
"Peng, Chao P" <chao.p.peng@intel.com>,
Yi Sun <yi.y.sun@linux.intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Eduardo Habkost <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>
Subject: Re: [PATCH v4 15/17] intel_iommu: Introduce a property x-fls for scalable modern mode
Date: Tue, 5 Nov 2024 14:26:43 +0800 [thread overview]
Message-ID: <798702d3-82d7-42c2-ba71-e93eaea29f58@intel.com> (raw)
In-Reply-To: <SJ0PR11MB674438005FA244B7CD16278292522@SJ0PR11MB6744.namprd11.prod.outlook.com>
On 2024/11/5 14:03, Duan, Zhenzhong wrote:
>
>
>> -----Original Message-----
>> From: Liu, Yi L <yi.l.liu@intel.com>
>> Sent: Tuesday, November 5, 2024 1:56 PM
>> Subject: Re: [PATCH v4 15/17] intel_iommu: Introduce a property x-fls for
>> scalable modern mode
>>
>> On 2024/11/5 11:11, Duan, Zhenzhong wrote:
>>
>>>>>>> + DEFINE_PROP_BOOL("x-fls", IntelIOMMUState, scalable_modern,
>> FALSE),
>>>>>>> DEFINE_PROP_BOOL("snoop-control", IntelIOMMUState,
>> snoop_control,
>>>>>> false),
>>>>>>
>>>>>> a question: is there any requirement on the layout of this array? Should
>>>>>> new fields added in the end?
>>>>>
>>>>> Looked over the history, seems we didn't have an explicit rule in
>> vtd_properties.
>>>>> I put "x-fls" just under "x-scalable-mode" as stage-1 is a sub-feature of
>> scalable
>>>> mode.
>>>>> Let me know if you have preference to add in the end.
>>>>
>>>> I don't have a preference for now as long as it does not break any
>>>> functionality. BTW. Will x-flt or x-flts better?
>>>
>>> So first level support(fls) vs. first level translation(flt) or first level translation
>> support(flts),
>>> looks same for me, but I can change to x-flt or x-flts if you prefer.
>>
>> x-flts looks better as it suits more how spec tells it (FSTS in the eap
>> register). :)
>
> Got it, just double confirm you prefer x-flts, not x-fsts?
x-flts as most of the code use flt instead of fst.
--
Regards,
Yi Liu
next prev parent reply other threads:[~2024-11-05 6:23 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-30 9:26 [PATCH v4 00/17] intel_iommu: Enable stage-1 translation for emulated device Zhenzhong Duan
2024-09-30 9:26 ` [PATCH v4 01/17] intel_iommu: Use the latest fault reasons defined by spec Zhenzhong Duan
2024-09-30 9:26 ` [PATCH v4 02/17] intel_iommu: Make pasid entry type check accurate Zhenzhong Duan
2024-09-30 9:26 ` [PATCH v4 03/17] intel_iommu: Add a placeholder variable for scalable modern mode Zhenzhong Duan
2024-10-04 5:22 ` CLEMENT MATHIEU--DRIF
2024-11-03 14:21 ` Yi Liu
2024-09-30 9:26 ` [PATCH v4 04/17] intel_iommu: Flush stage-2 cache in PASID-selective PASID-based iotlb invalidation Zhenzhong Duan
2024-11-04 2:49 ` Yi Liu
2024-11-04 7:37 ` CLEMENT MATHIEU--DRIF
2024-11-04 8:45 ` Yi Liu
2024-11-04 11:46 ` Duan, Zhenzhong
2024-11-04 11:50 ` Michael S. Tsirkin
2024-11-04 11:55 ` Duan, Zhenzhong
2024-11-04 12:01 ` Michael S. Tsirkin
2024-11-04 12:03 ` Duan, Zhenzhong
2024-09-30 9:26 ` [PATCH v4 05/17] intel_iommu: Rename slpte to pte Zhenzhong Duan
2024-09-30 9:26 ` [PATCH v4 06/17] intel_iommu: Implement stage-1 translation Zhenzhong Duan
2024-11-03 14:21 ` Yi Liu
2024-11-04 3:05 ` Duan, Zhenzhong
2024-11-04 7:02 ` Yi Liu
2024-09-30 9:26 ` [PATCH v4 07/17] intel_iommu: Check if the input address is canonical Zhenzhong Duan
2024-11-03 14:22 ` Yi Liu
2024-09-30 9:26 ` [PATCH v4 08/17] intel_iommu: Set accessed and dirty bits during first stage translation Zhenzhong Duan
2024-11-04 2:49 ` Yi Liu
2024-11-08 3:15 ` Jason Wang
2024-09-30 9:26 ` [PATCH v4 09/17] intel_iommu: Flush stage-1 cache in iotlb invalidation Zhenzhong Duan
2024-11-04 2:50 ` Yi Liu
2024-11-04 3:38 ` Duan, Zhenzhong
2024-11-04 7:36 ` Yi Liu
2024-09-30 9:26 ` [PATCH v4 10/17] intel_iommu: Process PASID-based " Zhenzhong Duan
2024-11-04 2:50 ` Yi Liu
2024-11-04 5:40 ` Duan, Zhenzhong
2024-11-04 7:05 ` Yi Liu
2024-09-30 9:26 ` [PATCH v4 11/17] intel_iommu: Add an internal API to find an address space with PASID Zhenzhong Duan
2024-11-04 2:50 ` Yi Liu
2024-11-04 5:47 ` Duan, Zhenzhong
2024-09-30 9:26 ` [PATCH v4 12/17] intel_iommu: Add support for PASID-based device IOTLB invalidation Zhenzhong Duan
2024-11-04 2:51 ` Yi Liu
2024-09-30 9:26 ` [PATCH v4 13/17] intel_iommu: piotlb invalidation should notify unmap Zhenzhong Duan
2024-11-04 3:05 ` Yi Liu
2024-11-04 8:15 ` Duan, Zhenzhong
2024-11-05 6:29 ` Yi Liu
2024-11-05 7:25 ` Duan, Zhenzhong
2024-11-08 4:39 ` Jason Wang
2024-09-30 9:26 ` [PATCH v4 14/17] intel_iommu: Set default aw_bits to 48 in scalable modern mode Zhenzhong Duan
2024-11-04 3:16 ` Yi Liu
2024-11-04 3:19 ` Duan, Zhenzhong
2024-11-04 7:25 ` Yi Liu
2024-11-08 4:41 ` Jason Wang
2024-11-08 5:30 ` Duan, Zhenzhong
2024-11-11 1:24 ` Jason Wang
2024-11-11 2:58 ` Duan, Zhenzhong
2024-11-11 3:03 ` Jason Wang
2024-09-30 9:26 ` [PATCH v4 15/17] intel_iommu: Introduce a property x-fls for " Zhenzhong Duan
2024-11-04 4:25 ` Yi Liu
2024-11-04 6:25 ` Duan, Zhenzhong
2024-11-04 7:23 ` Yi Liu
2024-11-05 3:11 ` Duan, Zhenzhong
2024-11-05 5:56 ` Yi Liu
2024-11-05 6:03 ` Duan, Zhenzhong
2024-11-05 6:26 ` Yi Liu [this message]
2024-09-30 9:26 ` [PATCH v4 16/17] intel_iommu: Introduce a property to control FS1GP cap bit setting Zhenzhong Duan
2024-11-04 7:00 ` Yi Liu
2024-11-08 4:45 ` Jason Wang
2024-09-30 9:26 ` [PATCH v4 17/17] tests/qtest: Add intel-iommu test Zhenzhong Duan
2024-09-30 9:52 ` Duan, Zhenzhong
2024-10-25 6:32 ` [PATCH v4 00/17] intel_iommu: Enable stage-1 translation for emulated device Duan, Zhenzhong
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