From: Paolo Bonzini <pbonzini@redhat.com>
To: Robert Hoo <robert.hu@linux.intel.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>,
qemu-devel@nongnu.org, wei.w.wang@intel.com
Subject: Re: [Qemu-devel] [PATCH v2 1/5] i386: Add support for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES MSRs
Date: Wed, 4 Jul 2018 11:40:45 +0200 [thread overview]
Message-ID: <79c8466a-83d2-2861-e87d-a4ac7aaa8fa3@redhat.com> (raw)
In-Reply-To: <1530686022.22880.56.camel@linux.intel.com>
On 04/07/2018 08:33, Robert Hoo wrote:
>>> And, if I implemented ARCH_CAPABILITIES-bits features in
> FeatureWord,
>>> then no necessity of having it in kvm_msr_entries, right?
> Hi Paolo, would you confirm this? I mean your previous patch "KVM: VMX:
> support MSR_IA32_ARCH_CAPABILITIES as a feature MSR" is not necessary
> now?
>
The patch is necessary. However, ARCH_CAPABILITIES is not needed in
kvm_msr. It is retrieved with KVM_GET_MSR on the *virtual machine* file
descriptor, while kvm_msr is for the KVM_GET/SET_MSR on the *vCPU* file
descriptor.
You still need to do KVM_SET_MSR on each vCPU when it is initialized;
however, that is done separately from the other MSRs.
Paolo
next prev parent reply other threads:[~2018-07-04 9:40 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-27 11:27 [Qemu-devel] [PATCH v2 0/5] Add Icelake CPU model Robert Hoo
2018-06-27 11:27 ` [Qemu-devel] [PATCH v2 1/5] i386: Add support for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES MSRs Robert Hoo
2018-06-27 17:03 ` Eduardo Habkost
2018-06-28 9:25 ` Robert Hoo
2018-06-28 13:56 ` Eduardo Habkost
2018-06-28 14:20 ` Paolo Bonzini
2018-07-03 8:48 ` Robert Hoo
2018-07-03 9:06 ` Paolo Bonzini
2018-07-03 11:06 ` Eduardo Habkost
2018-07-03 11:07 ` Robert Hoo
2018-07-03 13:38 ` Paolo Bonzini
2018-07-04 6:33 ` Robert Hoo
2018-07-04 9:40 ` Paolo Bonzini [this message]
2018-07-13 14:11 ` konrad.wilk
2018-07-13 14:44 ` Paolo Bonzini
2018-07-13 14:52 ` Konrad Rzeszutek Wilk
2018-07-14 0:02 ` Robert Hoo
2018-06-27 11:27 ` [Qemu-devel] [PATCH v2 2/5] i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR Robert Hoo
2018-06-28 18:28 ` Eduardo Habkost
2018-07-03 7:35 ` Robert Hoo
2018-07-03 11:00 ` Eduardo Habkost
2018-07-12 9:18 ` Robert Hoo
2018-07-12 15:47 ` Paolo Bonzini
2018-06-27 11:27 ` [Qemu-devel] [PATCH v2 3/5] i386: Add CPUID bit for PCONFIG Robert Hoo
2018-06-27 11:27 ` [Qemu-devel] [PATCH v2 4/5] i386: Add CPUID bit for WBNOINVD Robert Hoo
2018-06-27 11:27 ` [Qemu-devel] [PATCH v2 5/5] i386: Add new CPU model Icelake-{Server, Client} Robert Hoo
2018-07-02 2:31 ` [Qemu-devel] [PATCH v2 0/5] Add Icelake CPU model no-reply
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=79c8466a-83d2-2861-e87d-a4ac7aaa8fa3@redhat.com \
--to=pbonzini@redhat.com \
--cc=ehabkost@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=robert.hu@linux.intel.com \
--cc=wei.w.wang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).