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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id c9-20020aa78c09000000b004fdac35673bsm20372186pfd.147.2022.04.06.20.34.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 Apr 2022 20:34:43 -0700 (PDT) Message-ID: <79fa875e-0f67-5e21-c22f-9df700716575@linaro.org> Date: Wed, 6 Apr 2022 22:34:41 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH] x86: Implement Linear Address Masking support Content-Language: en-US To: "Kirill A. Shutemov" , qemu-devel@nongnu.org References: <20220407010107.34734-1-kirill.shutemov@linux.intel.com> From: Richard Henderson In-Reply-To: <20220407010107.34734-1-kirill.shutemov@linux.intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 4/6/22 20:01, Kirill A. Shutemov wrote: > Linear Address Masking feature makes CPU ignore some bits of the virtual > address. These bits can be used to encode metadata. > > The feature is enumerated with CPUID.(EAX=07H, ECX=01H):EAX.LAM[bit 26]. > > CR3.LAM_U57[bit 62] allows to encode 6 bits of metadata in bits 62:57 of > user pointers. > > CR3.LAM_U48[bit 61] allows to encode 15 bits of metadata in bits 62:48 > of user pointers. > > CR4.LAM_SUP[bit 28] allows to encode metadata of supervisor pointers. > If 5-level paging is in use, 6 bits of metadata can be encoded in 62:57. > For 4-level paging, 15 bits of metadata can be encoded in bits 62:48. > > QEMU strips address from the metadata bits and gets it to canonical > shape before handling memory access. It has to be done very early before > TLB lookup. The new hook is incorrect, in that it doesn't apply to addresses along the tlb fast path. But it isn't really needed. You can do all of the work in the existing tlb_fill hook. AArch64 has a similar feature, and that works fine. r~