From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: "Cédric Le Goater" <clg@kaod.org>,
"David Gibson" <david@gibson.dropbear.id.au>,
"Greg Kurz" <groug@kaod.org>,
qemu-ppc@nongnu.org
Subject: Re: [PATCH v2 18/25] target/ppc: Avoid tcg_const_* in fp-impl.c.inc
Date: Tue, 7 Mar 2023 18:43:10 -0300 [thread overview]
Message-ID: <7a0cb784-2522-7a3d-0c5d-4e3292642d8c@gmail.com> (raw)
In-Reply-To: <20230307183503.2512684-19-richard.henderson@linaro.org>
On 3/7/23 15:34, Richard Henderson wrote:
> All uses are strictly read-only.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> Cc: Daniel Henrique Barboza <danielhb413@gmail.com>
> Cc: Cédric Le Goater <clg@kaod.org>
> Cc: David Gibson <david@gibson.dropbear.id.au>
> Cc: Greg Kurz <groug@kaod.org>
> Cc: qemu-ppc@nongnu.org
> ---
> target/ppc/translate/fp-impl.c.inc | 26 ++++++++++++--------------
> 1 file changed, 12 insertions(+), 14 deletions(-)
>
> diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc
> index d5d88e7d49..57d8437851 100644
> --- a/target/ppc/translate/fp-impl.c.inc
> +++ b/target/ppc/translate/fp-impl.c.inc
> @@ -348,7 +348,7 @@ static void gen_fcmpo(DisasContext *ctx)
> t0 = tcg_temp_new_i64();
> t1 = tcg_temp_new_i64();
> gen_reset_fpstatus();
> - crf = tcg_const_i32(crfD(ctx->opcode));
> + crf = tcg_constant_i32(crfD(ctx->opcode));
> get_fpr(t0, rA(ctx->opcode));
> get_fpr(t1, rB(ctx->opcode));
> gen_helper_fcmpo(cpu_env, t0, t1, crf);
> @@ -368,7 +368,7 @@ static void gen_fcmpu(DisasContext *ctx)
> t0 = tcg_temp_new_i64();
> t1 = tcg_temp_new_i64();
> gen_reset_fpstatus();
> - crf = tcg_const_i32(crfD(ctx->opcode));
> + crf = tcg_constant_i32(crfD(ctx->opcode));
> get_fpr(t0, rA(ctx->opcode));
> get_fpr(t1, rB(ctx->opcode));
> gen_helper_fcmpu(cpu_env, t0, t1, crf);
> @@ -541,7 +541,7 @@ static void gen_mcrfs(DisasContext *ctx)
> tcg_gen_andi_i64(tnew_fpscr, tnew_fpscr,
> ~((0xF << shift) & FP_EX_CLEAR_BITS));
> /* FEX and VX need to be updated, so don't set fpscr directly */
> - tmask = tcg_const_i32(1 << nibble);
> + tmask = tcg_constant_i32(1 << nibble);
> gen_helper_store_fpscr(cpu_env, tnew_fpscr, tmask);
> }
>
> @@ -681,9 +681,7 @@ static void gen_mtfsb0(DisasContext *ctx)
> crb = 31 - crbD(ctx->opcode);
> gen_reset_fpstatus();
> if (likely(crb != FPSCR_FEX && crb != FPSCR_VX)) {
> - TCGv_i32 t0;
> - t0 = tcg_const_i32(crb);
> - gen_helper_fpscr_clrbit(cpu_env, t0);
> + gen_helper_fpscr_clrbit(cpu_env, tcg_constant_i32(crb));
> }
> if (unlikely(Rc(ctx->opcode) != 0)) {
> tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
> @@ -703,9 +701,7 @@ static void gen_mtfsb1(DisasContext *ctx)
> crb = 31 - crbD(ctx->opcode);
> /* XXX: we pretend we can only do IEEE floating-point computations */
> if (likely(crb != FPSCR_FEX && crb != FPSCR_VX && crb != FPSCR_NI)) {
> - TCGv_i32 t0;
> - t0 = tcg_const_i32(crb);
> - gen_helper_fpscr_setbit(cpu_env, t0);
> + gen_helper_fpscr_setbit(cpu_env, tcg_constant_i32(crb));
> }
> if (unlikely(Rc(ctx->opcode) != 0)) {
> tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
> @@ -733,10 +729,12 @@ static void gen_mtfsf(DisasContext *ctx)
> gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL);
> return;
> }
> - if (l) {
> - t0 = tcg_const_i32((ctx->insns_flags2 & PPC2_ISA205) ? 0xffff : 0xff);
> + if (!l) {
> + t0 = tcg_constant_i32(flm << (w * 8));
> + } else if (ctx->insns_flags2 & PPC2_ISA205) {
> + t0 = tcg_constant_i32(0xffff);
> } else {
> - t0 = tcg_const_i32(flm << (w * 8));
> + t0 = tcg_constant_i32(0xff);
> }
> t1 = tcg_temp_new_i64();
> get_fpr(t1, rB(ctx->opcode));
> @@ -767,8 +765,8 @@ static void gen_mtfsfi(DisasContext *ctx)
> return;
> }
> sh = (8 * w) + 7 - bf;
> - t0 = tcg_const_i64(((uint64_t)FPIMM(ctx->opcode)) << (4 * sh));
> - t1 = tcg_const_i32(1 << sh);
> + t0 = tcg_constant_i64(((uint64_t)FPIMM(ctx->opcode)) << (4 * sh));
> + t1 = tcg_constant_i32(1 << sh);
> gen_helper_store_fpscr(cpu_env, t0, t1);
> if (unlikely(Rc(ctx->opcode) != 0)) {
> tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr);
next prev parent reply other threads:[~2023-03-07 21:43 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-07 18:34 [PATCH v2 00/25] tcg: Remove tcg_const_* Richard Henderson
2023-03-07 18:34 ` [PATCH v2 01/25] target/arm: Use rmode >= 0 for need_rmode Richard Henderson
2023-03-07 18:34 ` [PATCH v2 02/25] target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf Richard Henderson
2023-03-08 17:25 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 03/25] target/arm: Improve arm_rmode_to_sf Richard Henderson
2023-03-07 18:34 ` [PATCH v2 04/25] target/arm: Consistently use ARMFPRounding during translation Richard Henderson
2023-03-07 18:34 ` [PATCH v2 05/25] target/arm: Create gen_set_rmode, gen_restore_rmode Richard Henderson
2023-03-09 9:48 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 06/25] target/arm: Improve trans_BFCI Richard Henderson
2023-03-07 23:05 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 07/25] target/arm: Avoid tcg_const_ptr in gen_sve_{ldr, str} Richard Henderson
2023-03-07 18:34 ` [PATCH v2 08/25] target/arm: Avoid tcg_const_* in translate-mve.c Richard Henderson
2023-03-09 13:27 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 09/25] target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn Richard Henderson
2023-03-07 23:02 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 10/25] target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn Richard Henderson
2023-03-07 18:34 ` [PATCH v2 11/25] target/arm: Avoid tcg_const_ptr in handle_rev Richard Henderson
2023-03-07 18:34 ` [PATCH v2 12/25] target/m68k: Reject immediate as destination in gen_ea_mode Richard Henderson
2023-03-09 12:32 ` Laurent Vivier
2023-03-09 16:27 ` Richard Henderson
2023-03-07 18:34 ` [PATCH v2 13/25] target/m68k: Use tcg_constant_i32 " Richard Henderson
2023-03-07 18:34 ` [PATCH v2 14/25] target/ppc: Avoid tcg_const_i64 in do_vcntmb Richard Henderson
2023-03-07 21:42 ` Daniel Henrique Barboza
2023-03-09 10:18 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 15/25] target/ppc: Avoid tcg_const_* in vmx-impl.c.inc Richard Henderson
2023-03-07 21:42 ` Daniel Henrique Barboza
2023-03-09 9:49 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 16/25] target/ppc: Avoid tcg_const_* in xxeval Richard Henderson
2023-03-07 21:42 ` Daniel Henrique Barboza
2023-03-09 9:51 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 17/25] target/ppc: Avoid tcg_const_* in vsx-impl.c.inc Richard Henderson
2023-03-07 21:42 ` Daniel Henrique Barboza
2023-03-09 9:52 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 18/25] target/ppc: Avoid tcg_const_* in fp-impl.c.inc Richard Henderson
2023-03-07 21:43 ` Daniel Henrique Barboza [this message]
2023-03-09 9:54 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 19/25] target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc Richard Henderson
2023-03-07 21:43 ` Daniel Henrique Barboza
2023-03-09 9:54 ` Philippe Mathieu-Daudé
2023-03-07 18:34 ` [PATCH v2 20/25] target/ppc: Rewrite trans_ADDG6S Richard Henderson
2023-03-07 21:51 ` Daniel Henrique Barboza
2023-03-07 22:34 ` Richard Henderson
2023-03-07 18:34 ` [PATCH v2 21/25] target/ppc: Fix gen_tlbsx_booke206 Richard Henderson
2023-03-07 21:44 ` Daniel Henrique Barboza
2023-03-07 18:35 ` [PATCH v2 22/25] target/ppc: Avoid tcg_const_* in translate.c Richard Henderson
2023-03-07 21:44 ` Daniel Henrique Barboza
2023-03-09 10:02 ` Philippe Mathieu-Daudé
2023-03-07 18:35 ` [PATCH v2 23/25] target/tricore: Use min/max for saturate Richard Henderson
2023-03-09 10:09 ` Philippe Mathieu-Daudé
2023-03-07 18:35 ` [PATCH v2 24/25] tcg: Drop tcg_const_*_vec Richard Henderson
2023-03-07 18:35 ` [PATCH v2 25/25] tcg: Drop tcg_const_* Richard Henderson
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