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[76.14.228.138]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f54a26590bsm2089559a91.4.2025.01.08.13.40.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Jan 2025 13:40:10 -0800 (PST) Message-ID: <7acc5d65-61d1-4fd7-a6e1-9a84997adae4@linaro.org> Date: Wed, 8 Jan 2025 13:40:08 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 55/81] tcg: Merge INDEX_op_and_{i32,i64} To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org References: <20250107080112.1175095-1-richard.henderson@linaro.org> <20250107080112.1175095-56-richard.henderson@linaro.org> <9fb636d2-3abd-4dd8-983b-b6fe65fb2f15@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <9fb636d2-3abd-4dd8-983b-b6fe65fb2f15@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/8/25 09:53, Philippe Mathieu-Daudé wrote: > On 7/1/25 09:00, Richard Henderson wrote: >> Signed-off-by: Richard Henderson >> --- >>   include/tcg/tcg-opc.h    |  3 +-- >>   target/sh4/translate.c   |  4 ++-- >>   tcg/optimize.c           | 40 ++++++++++++---------------------------- >>   tcg/tcg-op.c             |  4 ++-- >>   tcg/tcg.c                |  9 +++------ >>   tcg/tci.c                |  5 ++--- >>   tcg/tci/tcg-target.c.inc |  2 +- >>   7 files changed, 23 insertions(+), 44 deletions(-) > > >> @@ -1694,8 +1693,7 @@ static bool fold_deposit(OptContext *ctx, TCGOp *op) >>       TempOptInfo *t2 = arg_info(op->args[2]); >>       int ofs = op->args[3]; >>       int len = op->args[4]; >> -    int width; >> -    TCGOpcode and_opc; >> +    int width = ctx->type == TCG_TYPE_I32 ? 32 : 64; > > Some places (like in patch #10) you add assertions and here you remove. > Could leaving the switch case help if someone hypotecally implement for > 128-bit hosts? You're right that I probably should use tcg_type_size or something. r~ > > Anyhow, > Reviewed-by: Philippe Mathieu-Daudé > >>       uint64_t z_mask, s_mask; >>       if (ti_is_const(t1) && ti_is_const(t2)) { >> @@ -1704,24 +1702,11 @@ static bool fold_deposit(OptContext *ctx, TCGOp *op) >>                                             ti_const_val(t2))); >>       } >> -    switch (ctx->type) { >> -    case TCG_TYPE_I32: >> -        and_opc = INDEX_op_and_i32; >> -        width = 32; >> -        break; >> -    case TCG_TYPE_I64: >> -        and_opc = INDEX_op_and_i64; >> -        width = 64; >> -        break; >> -    default: >> -        g_assert_not_reached(); >> -    } >