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From: Laurent Vivier <laurent@vivier.eu>
To: "Alex Bennée" <alex.bennee@linaro.org>,
	zhaolichang <zhaolichang@huawei.com>
Cc: qemu-trivial@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH V3 08/10] disas/: fix some comment spelling errors
Date: Thu, 17 Sep 2020 20:40:41 +0200	[thread overview]
Message-ID: <7bd9cc11-988f-47fc-ce08-2c159c763ea0@vivier.eu> (raw)
In-Reply-To: <871rj0ztbc.fsf@linaro.org>

Le 17/09/2020 à 10:44, Alex Bennée a écrit :
> 
> zhaolichang <zhaolichang@huawei.com> writes:
> 
>> I found that there are many spelling errors in the comments of qemu,
>> so I used the spellcheck tool to check the spelling errors
>> and finally found some spelling errors in the disas folder.
>>
>> Signed-off-by: zhaolichang <zhaolichang@huawei.com>
> 
> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> 
> I suggest on your next posting you CC qemu-trivial@nongnu.org so the
> patches can get pulled in via the trivial tree.

It was.

Applied to my trivial-patches branch.

Thanks,
Laurent

> 
>> ---
>>  disas/hppa.c | 2 +-
>>  disas/m68k.c | 8 ++++----
>>  disas/ppc.c  | 2 +-
>>  3 files changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/disas/hppa.c b/disas/hppa.c
>> index 2dbd1fc445..dcf9a47f34 100644
>> --- a/disas/hppa.c
>> +++ b/disas/hppa.c
>> @@ -2021,7 +2021,7 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
>>  			fput_fp_reg (GET_FIELD (insn, 6, 10), info);
>>  		      break;
>>  
>> -		      /* 'fA' will not generate a space before the regsiter
>> +		      /* 'fA' will not generate a space before the register
>>  			 name.  Normally that is fine.  Except that it
>>  			 causes problems with xmpyu which has no FP format
>>  			 completer.  */
>> diff --git a/disas/m68k.c b/disas/m68k.c
>> index 863409c67c..aefaecfbd6 100644
>> --- a/disas/m68k.c
>> +++ b/disas/m68k.c
>> @@ -70,7 +70,7 @@ struct floatformat
>>    unsigned int exp_start;
>>    unsigned int exp_len;
>>    /* Bias added to a "true" exponent to form the biased exponent.  It
>> -     is intentionally signed as, otherwize, -exp_bias can turn into a
>> +     is intentionally signed as, otherwise, -exp_bias can turn into a
>>       very large number (e.g., given the exp_bias of 0x3fff and a 64
>>       bit long, the equation (long)(1 - exp_bias) evaluates to
>>       4294950914) instead of -16382).  */
>> @@ -479,7 +479,7 @@ struct m68k_opcode_alias
>>        and remaining 3 bits of register shifted 9 bits in first word.
>>        Indicate upper/lower in 1 bit shifted 7 bits in second word.
>>        Use with `R' or `u' format.
>> -   n  `m' withouth upper/lower indication. (For M[S]ACx; 4 bits split
>> +   n  `m' without upper/lower indication. (For M[S]ACx; 4 bits split
>>        with MSB shifted 6 bits in first word and remaining 3 bits of
>>        register shifted 9 bits in first word.  No upper/lower
>>        indication is done.)  Use with `R' or `u' format.
>> @@ -854,7 +854,7 @@ fetch_arg (unsigned char *buffer,
>>  
>>  /* Check if an EA is valid for a particular code.  This is required
>>     for the EMAC instructions since the type of source address determines
>> -   if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
>> +   if it is a EMAC-load instruction if the EA is mode 2-5, otherwise it
>>     is a non-load EMAC instruction and the bits mean register Ry.
>>     A similar case exists for the movem instructions where the register
>>     mask is interpreted differently for different EAs.  */
>> @@ -1080,7 +1080,7 @@ print_indexed (int basereg,
>>  
>>  /* Returns number of bytes "eaten" by the operand, or
>>     return -1 if an invalid operand was found, or -2 if
>> -   an opcode tabe error was found.
>> +   an opcode table error was found.
>>     ADDR is the pc for this arg to be relative to.  */
>>  
>>  static int
>> diff --git a/disas/ppc.c b/disas/ppc.c
>> index 63e97cfe1d..02be878198 100644
>> --- a/disas/ppc.c
>> +++ b/disas/ppc.c
>> @@ -5226,7 +5226,7 @@ operand_value_powerpc (const struct powerpc_operand *operand,
>>        if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
>>  	{
>>  	  /* BITM is always some number of zeros followed by some
>> -	     number of ones, followed by some numer of zeros.  */
>> +	     number of ones, followed by some number of zeros.  */
>>  	  unsigned long top = operand->bitm;
>>  	  /* top & -top gives the rightmost 1 bit, so this
>>  	     fills in any trailing zeros.  */
> 
> 



  reply	other threads:[~2020-09-17 18:43 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-17  7:50 [PATCH V3 00/10] fix some comment spelling errors zhaolichang
2020-09-17  7:50 ` [PATCH V3 01/10] qemu/: " zhaolichang
2020-09-17 18:36   ` Laurent Vivier
2020-09-17  7:50 ` [PATCH V3 02/10] migration/: " zhaolichang
2020-09-17 18:36   ` Laurent Vivier
2020-09-17  7:50 ` [PATCH V3 03/10] docs/: " zhaolichang
2020-09-17 18:37   ` Laurent Vivier
2020-09-17  7:50 ` [PATCH V3 04/10] scripts/: " zhaolichang
2020-09-17 18:38   ` Laurent Vivier
2020-09-17  7:50 ` [PATCH V3 05/10] util/: " zhaolichang
2020-09-17 18:38   ` Laurent Vivier
2020-09-17  7:50 ` [PATCH V3 06/10] linux-user/: " zhaolichang
2020-09-17 18:39   ` Laurent Vivier
2020-09-17  7:50 ` [PATCH V3 07/10] block/: " zhaolichang
2020-09-17  7:50 ` [PATCH V3 08/10] disas/: " zhaolichang
2020-09-17  8:44   ` Alex Bennée
2020-09-17 18:40     ` Laurent Vivier [this message]
2020-09-18 10:26       ` Alex Bennée
2020-09-17  7:50 ` [PATCH V3 09/10] qapi/: " zhaolichang
2020-09-17 18:41   ` Laurent Vivier
2020-09-17  7:50 ` [PATCH V3 10/10] contrib/: " zhaolichang
2020-09-17  8:18 ` [PATCH V3 00/10] " no-reply
2020-09-17  8:30 ` no-reply
2020-09-17  8:48 ` no-reply

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