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From: Auger Eric <eric.auger@redhat.com>
To: Andrew Jones <drjones@redhat.com>,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
	armbru@redhat.com, abologna@redhat.com, alex.bennee@linaro.org,
	Dave.Martin@arm.com
Subject: Re: [Qemu-devel] [PATCH 04/13] target/arm/kvm: Move the get/put of fpsimd registers out
Date: Wed, 5 Jun 2019 09:15:49 +0200	[thread overview]
Message-ID: <7c0c0ef2-6ab4-fdf9-9507-d1f460bfbd51@redhat.com> (raw)
In-Reply-To: <20190512083624.8916-5-drjones@redhat.com>

Hi Drew,

On 5/12/19 10:36 AM, Andrew Jones wrote:
> Move the getting/putting of the fpsimd registers out of
> kvm_arch_get/put_registers() into their own helper functions
> to prepare for alternatively getting/putting SVE registers.
> 
> No functional change.
> 
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
>  target/arm/kvm64.c | 148 +++++++++++++++++++++++++++------------------
>  1 file changed, 88 insertions(+), 60 deletions(-)
> 
> diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
> index ba232b27a6d3..61947f3716e1 100644
> --- a/target/arm/kvm64.c
> +++ b/target/arm/kvm64.c
> @@ -706,13 +706,53 @@ int kvm_arm_cpreg_level(uint64_t regidx)
>  #define AARCH64_SIMD_CTRL_REG(x)   (KVM_REG_ARM64 | KVM_REG_SIZE_U32 | \
>                   KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
>  
> +static int kvm_arch_put_fpsimd(CPUState *cs)
> +{
> +    ARMCPU *cpu = ARM_CPU(cs);
> +    CPUARMState *env = &cpu->env;
> +    struct kvm_one_reg reg;
> +    uint32_t fpr;
> +    int i, ret;
> +
> +    for (i = 0; i < 32; i++) {
> +        uint64_t *q = aa64_vfp_qreg(env, i);
> +#ifdef HOST_WORDS_BIGENDIAN
> +        uint64_t fp_val[2] = { q[1], q[0] };
> +        reg.addr = (uintptr_t)fp_val;
> +#else
> +        reg.addr = (uintptr_t)q;
> +#endif
> +        reg.id = AARCH64_SIMD_CORE_REG(fp_regs.vregs[i]);
> +        ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
> +        if (ret) {
> +            return ret;
> +        }
> +    }
> +
> +    reg.addr = (uintptr_t)(&fpr);
> +    fpr = vfp_get_fpsr(env);
> +    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpsr);
> +    ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
> +    if (ret) {
> +        return ret;
> +    }
> +
> +    reg.addr = (uintptr_t)(&fpr);
I don't think you need this assignment
> +    fpr = vfp_get_fpcr(env);
> +    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpcr);
> +    ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
> +    if (ret) {
> +        return ret;
> +    }
> +
> +    return 0;
> +}
> +
>  int kvm_arch_put_registers(CPUState *cs, int level)
>  {
>      struct kvm_one_reg reg;
> -    uint32_t fpr;
>      uint64_t val;
> -    int i;
> -    int ret;
> +    int i, ret;
>      unsigned int el;
>  
>      ARMCPU *cpu = ARM_CPU(cs);
> @@ -802,33 +842,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
>          }
>      }
>  
> -    /* Advanced SIMD and FP registers. */
> -    for (i = 0; i < 32; i++) {
> -        uint64_t *q = aa64_vfp_qreg(env, i);
> -#ifdef HOST_WORDS_BIGENDIAN
> -        uint64_t fp_val[2] = { q[1], q[0] };
> -        reg.addr = (uintptr_t)fp_val;
> -#else
> -        reg.addr = (uintptr_t)q;
> -#endif
> -        reg.id = AARCH64_SIMD_CORE_REG(fp_regs.vregs[i]);
> -        ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
> -        if (ret) {
> -            return ret;
> -        }
> -    }
> -
> -    reg.addr = (uintptr_t)(&fpr);
> -    fpr = vfp_get_fpsr(env);
> -    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpsr);
> -    ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
> -    if (ret) {
> -        return ret;
> -    }
> -
> -    fpr = vfp_get_fpcr(env);
> -    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpcr);
> -    ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
> +    ret = kvm_arch_put_fpsimd(cs);
>      if (ret) {
>          return ret;
>      }
> @@ -849,14 +863,54 @@ int kvm_arch_put_registers(CPUState *cs, int level)
>      return ret;
>  }
>  
> +static int kvm_arch_get_fpsimd(CPUState *cs)
> +{
> +    ARMCPU *cpu = ARM_CPU(cs);
> +    CPUARMState *env = &cpu->env;
> +    struct kvm_one_reg reg;
> +    uint32_t fpr;
> +    int i, ret;
> +
> +    for (i = 0; i < 32; i++) {
> +        uint64_t *q = aa64_vfp_qreg(env, i);
> +        reg.id = AARCH64_SIMD_CORE_REG(fp_regs.vregs[i]);
> +        reg.addr = (uintptr_t)q;
> +        ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
> +        if (ret) {
> +            return ret;
> +        } else {
> +#ifdef HOST_WORDS_BIGENDIAN
> +            uint64_t t;
> +            t = q[0], q[0] = q[1], q[1] = t;
> +#endif
> +        }
> +    }
> +
> +    reg.addr = (uintptr_t)(&fpr);
> +    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpsr);
> +    ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
> +    if (ret) {
> +        return ret;
> +    }
> +    vfp_set_fpsr(env, fpr);
> +
> +    reg.addr = (uintptr_t)(&fpr);
same here
> +    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpcr);
> +    ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
> +    if (ret) {
> +        return ret;
> +    }
> +    vfp_set_fpcr(env, fpr);
> +
> +    return 0;
> +}
> +
>  int kvm_arch_get_registers(CPUState *cs)
>  {
>      struct kvm_one_reg reg;
>      uint64_t val;
> -    uint32_t fpr;
>      unsigned int el;
> -    int i;
> -    int ret;
> +    int i, ret;
>  
>      ARMCPU *cpu = ARM_CPU(cs);
>      CPUARMState *env = &cpu->env;
> @@ -945,36 +999,10 @@ int kvm_arch_get_registers(CPUState *cs)
>          env->spsr = env->banked_spsr[i];
>      }
>  
> -    /* Advanced SIMD and FP registers */
> -    for (i = 0; i < 32; i++) {
> -        uint64_t *q = aa64_vfp_qreg(env, i);
> -        reg.id = AARCH64_SIMD_CORE_REG(fp_regs.vregs[i]);
> -        reg.addr = (uintptr_t)q;
> -        ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
> -        if (ret) {
> -            return ret;
> -        } else {
> -#ifdef HOST_WORDS_BIGENDIAN
> -            uint64_t t;
> -            t = q[0], q[0] = q[1], q[1] = t;
> -#endif
> -        }
> -    }
> -
> -    reg.addr = (uintptr_t)(&fpr);
> -    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpsr);
> -    ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
> -    if (ret) {
> -        return ret;
> -    }
> -    vfp_set_fpsr(env, fpr);
> -
> -    reg.id = AARCH64_SIMD_CTRL_REG(fp_regs.fpcr);
> -    ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
> +    ret = kvm_arch_get_fpsimd(cs);
>      if (ret) {
>          return ret;
>      }
> -    vfp_set_fpcr(env, fpr);
>  
>      ret = kvm_get_vcpu_events(cpu);
>      if (ret) {
> 

Besides
Reviewed-by: Eric Auger <eric.auger@redhat.com>

Thanks

Eric



  reply	other threads:[~2019-06-05  7:17 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-12  8:36 [Qemu-devel] [PATCH 00/13] target/arm/kvm: enable SVE in guests Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] [PATCH 01/13] target/arm/kvm64: fix error returns Andrew Jones
2019-06-05  7:20   ` Auger Eric
2019-05-12  8:36 ` [Qemu-devel] [PATCH 02/13] update-linux-headers: Add sve_context.h to asm-arm64 Andrew Jones
2019-06-05  7:21   ` Auger Eric
2019-06-05  7:30     ` Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] [PATCH 03/13] HACK: linux header update Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] [PATCH 04/13] target/arm/kvm: Move the get/put of fpsimd registers out Andrew Jones
2019-06-05  7:15   ` Auger Eric [this message]
2019-06-05  7:27     ` Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] [PATCH 05/13] target/arm/kvm: Add kvm_arch_get/put_sve Andrew Jones
2019-05-13 12:31   ` Dave Martin
2019-05-13 13:55     ` Andrew Jones
2019-05-13 15:31       ` Dave Martin
2019-05-13 15:40         ` Peter Maydell
2019-05-13 16:05           ` Dave Martin
2019-05-13 16:40     ` Richard Henderson
2019-05-13 18:14       ` Andrew Jones
2019-05-13 18:31         ` Richard Henderson
2019-05-13 12:43   ` Dave Martin
2019-05-13 14:07     ` Andrew Jones
2019-05-13 14:39       ` Dave Martin
2019-05-13 16:58         ` Richard Henderson
2019-05-14  9:10           ` Dave Martin
2019-05-12  8:36 ` [Qemu-devel] [PATCH 06/13] target/arm/kvm: max cpu: Enable SVE when available Andrew Jones
2019-06-05  9:09   ` Auger Eric
2019-06-05 11:04     ` Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] [PATCH 07/13] target/arm/kvm: max cpu: Allow sve max vector length setting Andrew Jones
2019-05-13 17:19   ` Richard Henderson
2019-05-13 18:19     ` Andrew Jones
2019-06-06  8:30   ` Auger Eric
2019-06-06  8:53     ` Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] [PATCH 08/13] target/arm/monitor: Add query-sve-vector-lengths Andrew Jones
2019-05-13 16:12   ` Markus Armbruster
2019-05-13 18:30     ` Andrew Jones
2019-05-14  5:32       ` Markus Armbruster
2019-05-12  8:36 ` [Qemu-devel] [PATCH 09/13] target/arm/kvm: Export kvm_arm_get_sve_vls Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] [PATCH 10/13] target/arm/monitor: kvm: only return valid sve vector sets Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] [PATCH 11/13] target/arm/cpu64: max cpu: Introduce sve-vls-map Andrew Jones
2019-05-13 11:26   ` Dave Martin
2019-05-13 12:30     ` Andrew Jones
2019-05-13 12:41       ` Dave Martin
2019-05-13 12:57         ` Andrew Jones
2019-05-13 13:12           ` Dave Martin
2019-05-13 13:45             ` Andrew Jones
2019-05-13 14:35               ` Dave Martin
2019-05-13 15:25   ` Markus Armbruster
2019-05-13 18:31     ` Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] [PATCH 12/13] target/arm/kvm: max cpu: Add support for sve-vls-map Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] [PATCH 13/13] target/arm/kvm: host " Andrew Jones
2019-05-13 15:37   ` Markus Armbruster
2019-05-13 18:33     ` Andrew Jones
2019-05-13  9:32 ` [Qemu-devel] [PATCH 00/13] target/arm/kvm: enable SVE in guests Andrea Bolognani
2019-05-13 11:15   ` Dave Martin
2019-05-13 12:38     ` Andrew Jones
2019-05-13 12:50       ` Dave Martin
2019-05-13 12:36   ` Andrew Jones
2019-05-14 12:29     ` Andrea Bolognani
2019-05-14 12:53       ` Andrew Jones
2019-05-14 16:03         ` Andrea Bolognani
2019-05-14 20:14           ` Richard Henderson
2019-05-15  8:03             ` Andrea Bolognani
2019-05-15 11:14               ` Dave Martin
2019-05-15 11:28                 ` Andrea Bolognani
2019-05-15 12:47                   ` Dave Martin
2019-05-15  9:15           ` Andrew Jones
2019-05-13  9:52 ` Peter Maydell
2019-05-13 12:43   ` Andrew Jones
2019-05-13 18:46 ` Richard Henderson
2019-05-13 19:16   ` Andrew Jones
2019-05-14  9:05   ` Peter Maydell

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