* [Qemu-devel] OpenRISC: SMP support for more than 2 cores
@ 2018-06-07 13:27 Davidson Francis
2018-06-07 15:56 ` [Qemu-devel] [OpenRISC] " Richard Henderson
0 siblings, 1 reply; 3+ messages in thread
From: Davidson Francis @ 2018-06-07 13:27 UTC (permalink / raw)
To: QEMU Development, Openrisc
Dear all,
Currently Qemu supports only 2 cores when SMP enabled for or1k architecure, so
I would like to know if there is a quick way to increase the number of cores by
changing a few lines of code or to accomplish this, will requires significant
changes in the source code?
I'm asking because I'll start working with the SMP feature and
it would be great to use Qemu with more than two cores.
Kind regards,
Davidson Francis.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [OpenRISC] OpenRISC: SMP support for more than 2 cores
2018-06-07 13:27 [Qemu-devel] OpenRISC: SMP support for more than 2 cores Davidson Francis
@ 2018-06-07 15:56 ` Richard Henderson
2018-06-08 6:48 ` Davidson Francis
0 siblings, 1 reply; 3+ messages in thread
From: Richard Henderson @ 2018-06-07 15:56 UTC (permalink / raw)
To: Davidson Francis, QEMU Development, Openrisc
On 06/07/2018 06:27 AM, Davidson Francis wrote:
> Dear all,
>
> Currently Qemu supports only 2 cores when SMP enabled for or1k architecure, so
> I would like to know if there is a quick way to increase the number of cores by
> changing a few lines of code or to accomplish this, will requires significant
> changes in the source code?
Probably not significant changes.
The limit of 2 seems to be the way the interrupts are wired up.
That can probably be extended relatively easily.
r~
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [OpenRISC] OpenRISC: SMP support for more than 2 cores
2018-06-07 15:56 ` [Qemu-devel] [OpenRISC] " Richard Henderson
@ 2018-06-08 6:48 ` Davidson Francis
0 siblings, 0 replies; 3+ messages in thread
From: Davidson Francis @ 2018-06-08 6:48 UTC (permalink / raw)
To: Richard Henderson, QEMU Development, Openrisc
On 07-06-2018 12:56, Richard Henderson wrote:
> On 06/07/2018 06:27 AM, Davidson Francis wrote:
>> Dear all,
>>
>> Currently Qemu supports only 2 cores when SMP enabled for or1k architecure, so
>> I would like to know if there is a quick way to increase the number of cores by
>> changing a few lines of code or to accomplish this, will requires significant
>> changes in the source code?
>
> Probably not significant changes.
> The limit of 2 seems to be the way the interrupts are wired up.
> That can probably be extended relatively easily.
>
>
> r~
>
Thank you Richard, I will investigate how the interrupts are wired.
Kind regards,
Davidson Francis.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-06-07 13:27 [Qemu-devel] OpenRISC: SMP support for more than 2 cores Davidson Francis
2018-06-07 15:56 ` [Qemu-devel] [OpenRISC] " Richard Henderson
2018-06-08 6:48 ` Davidson Francis
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