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From: Davidson Francis <davidsondfgl@gmail.com>
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Date: Fri, 8 Jun 2018 03:48:40 -0300
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Subject: Re: [Qemu-devel] [OpenRISC] OpenRISC: SMP support for more than 2
 cores
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To: Richard Henderson <rth@twiddle.net>, QEMU Development <qemu-devel@nongnu.org>, Openrisc <openrisc@lists.librecores.org>

On 07-06-2018 12:56, Richard Henderson wrote:
> On 06/07/2018 06:27 AM, Davidson Francis wrote:
>> Dear all,
>>
>> Currently Qemu supports only 2 cores when SMP enabled for or1k architecure, so
>> I would like to know if there is a quick way to increase the number of cores by
>> changing a few lines of code or to accomplish this, will requires significant
>> changes in the source code?
> 
> Probably not significant changes.
> The limit of 2 seems to be the way the interrupts are wired up.
> That can probably be extended relatively easily.
> 
> 
> r~
> 

Thank you Richard, I will investigate how the interrupts are wired.

Kind regards,
Davidson Francis.