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[110.175.13.142]) by smtp.gmail.com with ESMTPSA id u32-20020a631420000000b004393c5a8006sm48524pgl.75.2022.10.13.11.52.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 13 Oct 2022 11:52:26 -0700 (PDT) Message-ID: <7ca40cf8-f49f-6a84-c384-f031f69a3305@linaro.org> Date: Fri, 14 Oct 2022 05:52:20 +1100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH v2] tcg/loongarch64: Add direct jump support Content-Language: en-US To: Qi Hu , WANG Xuerui Cc: qemu-devel@nongnu.org References: <20221013030123.979720-1-huqi@loongson.cn> From: Richard Henderson In-Reply-To: <20221013030123.979720-1-huqi@loongson.cn> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/13/22 20:01, Qi Hu wrote: > Similar to the ARM64, LoongArch has PC-relative instructions such as > PCADDU18I. These instructions can be used to support direct jump for > LoongArch. Additionally, if instruction "B offset" can cover the target > address(target is within ±128MB range), a single "B offset" plus a nop > will be used by "tb_target_set_jump_target". > > Signed-off-by: Qi Hu First, when sending a v2, do not reply to a different thread. This confuses our patch tracking tools like patchew.org. > +void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_rx, > + uintptr_t jmp_rw, uintptr_t addr) > +{ > + tcg_insn_unit i1, i2; > + ptrdiff_t upper, lower; > + ptrdiff_t offset = (addr - jmp_rx) >> 2; > + > + if (offset == sextreg(offset, 0, 28)) { > + i1 = encode_sd10k16_insn(OPC_B, offset); > + i2 = NOP; > + } else { > + upper = ((offset + (1 << 15)) >> 16) & 0xfffff; > + lower = (offset & 0xffff); This computation is incorrect, cropping the values to unsigned. This will assert inside > + /* patch pcaddu18i */ > + i1 = encode_dsj20_insn(OPC_PCADDU18I, TCG_REG_T0, upper); > + /* patch jirl */ > + i2 = encode_djsk16_insn(OPC_JIRL, TCG_REG_ZERO, TCG_REG_T0, lower); these encoding functions. You want lower = (int16_t)offset; upper = (offset - lower) >> 16; Wang Xuerui asked you to remove the redundant comments there, which give no more information than the code itself. > @@ -1058,11 +1088,24 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, > break; > > case INDEX_op_goto_tb: > - assert(s->tb_jmp_insn_offset == 0); > - /* indirect jump method */ > - tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_REG_ZERO, > - (uintptr_t)(s->tb_jmp_target_addr + a0)); > - tcg_out_opc_jirl(s, TCG_REG_ZERO, TCG_REG_TMP0, 0); > + if (s->tb_jmp_insn_offset != NULL) { > + /* TCG_TARGET_HAS_direct_jump */ > + /* Ensure that "patch area" are 8-byte aligned so that an > + atomic write can be used to patch the target address. */ > + if ((uintptr_t)s->code_ptr & 7) { > + tcg_out_nop(s); > + } > + s->tb_jmp_insn_offset[a0] = tcg_current_code_size(s); > + /* actual branch destination will be patched by > + tb_target_set_jmp_target later */ > + tcg_out_opc_pcaddu18i(s, TCG_REG_TMP0, 0); > + tcg_out_opc_jirl(s, TCG_REG_ZERO, TCG_REG_TMP0, 0); > + } else { > + /* !TCG_TARGET_HAS_direct_jump */ > + tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, TCG_REG_ZERO, > + (uintptr_t)(s->tb_jmp_target_addr + a0)); > + tcg_out_opc_jirl(s, TCG_REG_ZERO, TCG_REG_TMP0, 0); > + } Your comment formatting does not follow our coding style. It must be /* * Comment with * multiple lines. */ There is a tool, ./scripts/check_patch.pl, that will diagnose this error. > diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h > index 67380b2432..c008d5686d 100644 > --- a/tcg/loongarch64/tcg-target.h > +++ b/tcg/loongarch64/tcg-target.h > @@ -123,7 +123,7 @@ typedef enum { > #define TCG_TARGET_HAS_clz_i32 1 > #define TCG_TARGET_HAS_ctz_i32 1 > #define TCG_TARGET_HAS_ctpop_i32 0 > -#define TCG_TARGET_HAS_direct_jump 0 > +#define TCG_TARGET_HAS_direct_jump 1 > #define TCG_TARGET_HAS_brcond2 0 > #define TCG_TARGET_HAS_setcond2 0 > #define TCG_TARGET_HAS_qemu_st8_i32 0 > @@ -166,7 +166,6 @@ typedef enum { > #define TCG_TARGET_HAS_muluh_i64 1 > #define TCG_TARGET_HAS_mulsh_i64 1 > > -/* not defined -- call should be eliminated at compile time */ > void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t); > > #define TCG_TARGET_DEFAULT_MO (0) You are missing a change to #define MAX_CODE_GEN_BUFFER_SIZE SIZE_MAX The branch distance with pcaddu18i is +/- 37 bits (128GB) not 64 bits. r~