* [Qemu-devel] Creating an own target. How to deal with Flags and Branches in TCG?
@ 2009-08-11 17:42 Klaus F
2009-08-28 12:33 ` Edgar E. Iglesias
0 siblings, 1 reply; 2+ messages in thread
From: Klaus F @ 2009-08-11 17:42 UTC (permalink / raw)
To: qemu-devel
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Hi,
I'm interested in creating my own target for qemu
My goal is to learn how to implement own target processors and own target
peripherals with qemu.
I'm having minor difficulties in understanding how comditional branches and
the handling of flags is done.
I'll continue looking by myself, but if any of you has some ncie pointers,
then I would really appreciate it.
tcg/README is a nice staring point,
but I didn't understand the section about labels and conditions that well.
Currently I'm looking at the generation of an own target CPU.
I can already execute my first few instructions, which load and modify
registers.
Now I'd like to work on status registers and conditional branches.
What I did so far:
- As starting point I took the Xilinx Microblaze target (randomly chosen, as
I thought an FPGA core might be relatively simple)
- I am using gen_intermediate_code_internal() and replaced only the part for
decoding instructions
- I added decoding for a few instructions and can now load registers and
perform ALU operations
What I am not 100% clear about is how flags (Carry,Zero, . . .) are
synchroniced between the TCG engine und my virtual target.
What I'd like to know
- which tcg_gen commands modify flags and which ones don't ?
- how can I forward the flag values to my target status register ?
- how can I conditionally branch on flags?
Let's assume my target had one AND instruction, that ands two registers, but
does not modify the status registers and an alternative
instruction, that modifies the statis registers. How would I model this with
TCG
Example code piece for an imaginary target platform
MVI R0, 0x03 ; R0 <- 0x03
MVI R1, 0x06 ; R1 <- 0x06
MVI R2, 0x0c ; R2 <- 0x0c
ANDF R3,R0,R2 ; R3 <- R0 & R2 / additionally set zero flag if R3 is zero
AND R4,R0,R1 ; R4 <- R0 & R1 / but do NOT change the flags
BRZ PC+0x10
NEXT_INSTRUCTION
I would translate this into
tcg_gen_movi_tl(cpu_R[0], 0x03);
tcg_gen_movi_tl(cpu_R[1], 0x06);
tcg_gen_movi_tl(cpu_R[2], 0x0c);
tcg_gen_add_tl(cpu_R[3].cpu_R[0],cpu_R[2]);
// Now I'd like to keep the flags
tcg_gen_add_tl(cpu_R[4],cpu_R[0],cpu_R[1]);
// Now I'd like to discard the flags
// here I'd like to jump conditionally to PC+0x10
thanks in advance for any pointers / suggestions
Klaus
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] Creating an own target. How to deal with Flags and Branches in TCG?
2009-08-11 17:42 [Qemu-devel] Creating an own target. How to deal with Flags and Branches in TCG? Klaus F
@ 2009-08-28 12:33 ` Edgar E. Iglesias
0 siblings, 0 replies; 2+ messages in thread
From: Edgar E. Iglesias @ 2009-08-28 12:33 UTC (permalink / raw)
To: Klaus F; +Cc: qemu-devel
On Tue, Aug 11, 2009 at 07:42:44PM +0200, Klaus F wrote:
> Hi,
Hi,
Sorry for the late answer, I've been offline...
> I'm interested in creating my own target for qemu
> My goal is to learn how to implement own target processors and own
> target peripherals with qemu.
> I'm having minor difficulties in understanding how comditional branches
> and the handling of flags is done.
> I'll continue looking by myself, but if any of you has some ncie
> pointers, then I would really appreciate it.
> tcg/README is a nice staring point,
> but I didn't understand the section about labels and conditions that
> well.
> Currently I'm looking at the generation of an own target CPU.
> I can already execute my first few instructions, which load and modify
> registers.
> Now I'd like to work on status registers and conditional branches.
> What I did so far:
> - As starting point I took the Xilinx Microblaze target (randomly
> chosen, as I thought an FPGA core might be relatively simple)
The microblaze port is one of the smaller and simpler ones, so yes it
probably is a good starting point.
> - I am using gen_intermediate_code_internal() and replaced only the
> part for decoding instructions
> - I added decoding for a few instructions and can now load registers
> and perform ALU operations
> What I am not 100% clear about is how flags (Carry,Zero, . . .) are
> synchroniced between the TCG engine und my virtual target.
Regarding status flags, microblaze might not be the best target to look
at because it doesn't have many flags. Microblaze does not store the
traditional Z, N nor V flags in a status reg. They are only used in
the pipe to properly execute the compare-and-conditionally-branch and
compare instructions.
Carry is there though. See helper_addkc() and helper_subkc() for
more detail on how carry is computed and updated.
> What I'd like to know
> - which tcg_gen commands modify flags and which ones don't ?
TCG does not really have flags. You have to implement emulation of
whatever target flags you need on top of TCG.
> - how can I forward the flag values to my target status register ?
The same way you would set or clear bits in any TCG variable.
> - how can I conditionally branch on flags?
For the microblaze target, I suggest looking at eval_cc(), eval_cond_jmp()
and dec_bcc().
Cheers
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