From: Richard Henderson <richard.henderson@linaro.org>
To: Warner Losh <imp@bsdimp.com>
Cc: Ajeet Singh <itachis6234@gmail.com>,
qemu-devel@nongnu.org, Ajeet Singh <itachis@freebsd.org>,
Stacey Son <sson@freebsd.org>, Kyle Evans <kevans@freebsd.org>,
Sean Bruno <sbruno@freebsd.org>,
Jessica Clarke <jrtc27@jrtc27.com>
Subject: Re: [PATCH 02/23] Added CPU loop function
Date: Sun, 23 Jun 2024 09:30:47 -0700 [thread overview]
Message-ID: <7db4406b-a4f6-4aa3-ab69-3dc2b0f4e0c3@linaro.org> (raw)
In-Reply-To: <CANCZdfpQ0TmCU-9OAMkJo2_4UDFpRVVRPc5qzLgmo75wVXkQew@mail.gmail.com>
On 6/22/24 11:49, Warner Losh wrote:
>
>
> On Mon, Jun 17, 2024 at 10:24 PM Richard Henderson <richard.henderson@linaro.org
> <mailto:richard.henderson@linaro.org>> wrote:
>
> On 6/17/24 11:57, Ajeet Singh wrote:
> > + /*
> > + * The carry bit is cleared for no error; set for error.
> > + * See arm64/arm64/vm_machdep.c cpu_set_syscall_retval()
> > + */
> > + pstate = pstate_read(env);
> > + if (ret >= 0) {
> > + pstate &= ~PSTATE_C;
> > + env->xregs[0] = ret;
> > + } else if (ret == -TARGET_ERESTART) {
> > + env->pc -= 4;
> > + break;
> > + } else if (ret != -TARGET_EJUSTRETURN) {
> > + pstate |= PSTATE_C;
> > + env->xregs[0] = -ret;
> > + }
> > + pstate_write(env, pstate);
>
> No need for full pstate read/write:
>
> env->CF = {0,1};
>
>
> If I understand what you're suggesting, the quoted code can be replaced
> by the following, faster construct:
>
> /*
> * The carry bit is cleared for no error; set for error.
> * See arm64/arm64/vm_machdep.c cpu_set_syscall_retval()
> */
> if (ret >= 0) {
> env->CF = 0;
> env->xregs[0] = ret;
> } else if (ret == -TARGET_ERESTART) {
> env->pc -= 4;
> break;
> } else if (ret != -TARGET_EJUSTRETURN) {
> env->CF = 1;
> env->xregs[0] = -ret;
> }
> break;
>
> Is that what you're saying?
Yes.
>
> > + break;
> > +
> > + case EXCP_INTERRUPT:
> > + /* Just indicate that signals should be handle ASAP. */
> > + break;
> > +
> > + case EXCP_UDEF:
> > + force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPN, env->pc);
> > + break;
> > +
> > +
> > + case EXCP_PREFETCH_ABORT:
> > + case EXCP_DATA_ABORT:
> > + /* We should only arrive here with EC in {DATAABORT, INSNABORT}. */
> > + ec = syn_get_ec(env->exception.syndrome);
>
> Nevermind about my question about syndrome.h vs patch 1.
>
>
> Ah, Since we have to re-roll this patch anyway, maybe moving it is a good idea?
> Honestly, I'm good either way.
Least effort is called for. :-)
r~
next prev parent reply other threads:[~2024-06-23 16:31 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-17 18:57 [PATCH 00/23] ARM AArch64 Support for BSD Ajeet Singh
2024-06-17 18:57 ` [PATCH 01/23] Add CPU initialization function Ajeet Singh
2024-06-18 4:17 ` Richard Henderson
2024-06-22 18:37 ` Warner Losh
2024-06-17 18:57 ` [PATCH 02/23] Added CPU loop function Ajeet Singh
2024-06-18 4:24 ` Richard Henderson
2024-06-22 18:49 ` Warner Losh
2024-06-23 16:30 ` Richard Henderson [this message]
2024-06-17 18:57 ` [PATCH 03/23] Added function to clone CPU state Ajeet Singh
2024-06-18 4:27 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 04/23] AArch64 specific CPU for bsd-user Ajeet Singh
2024-06-18 4:28 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 05/23] Managing CPU register for BSD-USER Ajeet Singh
2024-06-18 4:28 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 06/23] Add Aarch64 register handling Ajeet Singh
2024-06-18 4:35 ` Richard Henderson
2024-06-23 20:37 ` Warner Losh
2024-06-17 18:57 ` [PATCH 07/23] Add ARM AArch64 TLS Management Prototypes for BSD-User Ajeet Singh
2024-06-18 4:38 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 08/23] Add Aarch64 sysarch() system call emulation for BSD-USER Ajeet Singh
2024-06-18 4:39 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 09/23] Add thread setup " Ajeet Singh
2024-06-18 22:07 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 10/23] Add thread initialization " Ajeet Singh
2024-06-18 22:10 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 11/23] Update ARM AArch64 VM parameter definitions for bsd-user Ajeet Singh
2024-06-18 22:16 ` Richard Henderson
2024-06-22 18:56 ` Warner Losh
2024-06-17 18:57 ` [PATCH 12/23] Add ability to get rval2 Ajeet Singh
2024-06-18 22:17 ` Richard Henderson
2024-06-23 22:48 ` Warner Losh
2024-06-17 18:57 ` [PATCH 13/23] Add ARM AArch64 ELF definitions for bsd-user Ajeet Singh
2024-06-18 22:18 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 14/23] Add ARM AArch64 hardware capability definitions Ajeet Singh
2024-06-18 22:20 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 15/23] Add function to retrieve ARM AArch64 hardware capabilities Ajeet Singh
2024-06-18 22:21 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 16/23] Add function to retrieve additional ARM AArch64 hwcap Ajeet Singh
2024-06-18 22:22 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 17/23] Add ARM AArch64 sigcode setup function for bsd-user Ajeet Singh
2024-06-18 22:32 ` Richard Henderson
2024-06-17 18:57 ` [PATCH 18/23] Add ARM AArch64 specific signal definitions " Ajeet Singh
2024-06-18 22:35 ` Richard Henderson
2024-06-17 18:58 ` [PATCH 19/23] Add ARM AArch64 signal trampoline argument setup " Ajeet Singh
2024-06-18 22:37 ` Richard Henderson
2024-06-17 18:58 ` [PATCH 20/23] Add get_mcontext function for ARM AArch64 in bsd-user Ajeet Singh
2024-06-18 22:47 ` Richard Henderson
2024-06-17 18:58 ` [PATCH 21/23] Add setup_sigframe_arch " Ajeet Singh
2024-06-18 22:49 ` Richard Henderson
2024-06-17 18:58 ` [PATCH 22/23] Add set_mcontext " Ajeet Singh
2024-06-18 22:50 ` Richard Henderson
2024-06-23 15:54 ` Warner Losh
2024-06-23 17:48 ` Richard Henderson
2024-06-17 18:58 ` [PATCH 23/23] Add get_ucontext_sigreturn function Ajeet Singh
2024-06-18 22:56 ` Richard Henderson
2024-06-23 16:01 ` Warner Losh
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