From: Richard Henderson <richard.henderson@linaro.org>
To: Alistair Francis <alistair23@gmail.com>, qemu-devel@nongnu.org
Cc: "Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PULL 12/54] target/riscv: deprecate the 'any' CPU type
Date: Thu, 19 Oct 2023 11:13:41 -0700 [thread overview]
Message-ID: <7dc0b6cc-7112-4f12-b52e-13f217d8dae3@linaro.org> (raw)
In-Reply-To: <20231012041051.2572507-13-alistair.francis@wdc.com>
On 10/11/23 21:10, Alistair Francis wrote:
> From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
>
> The 'any' CPU type was introduced in commit dc5bd18fa5725 ("RISC-V CPU
> Core Definition"), being around since the beginning. It's not an easy
> CPU to use: it's undocumented and its name doesn't tell users much about
> what the CPU is supposed to bring. 'git log' doesn't help us either in
> knowing what was the original design of this CPU type.
>
> The closest we have is a comment from Alistair [1] where he recalls from
> memory that the 'any' CPU is supposed to behave like the newly added
> 'max' CPU. He also suggested that the 'any' CPU should be removed.
>
> The default CPUs are rv32 and rv64, so removing the 'any' CPU will have
> impact only on users that might have a script that uses '-cpu any'.
> And those users are better off using the default CPUs or the new 'max'
> CPU.
>
> We would love to just remove the code and be done with it, but one does
> not simply remove a feature in QEMU. We'll put the CPU in quarantine
> first, letting users know that we have the intent of removing it in the
> future.
>
> [1] https://lists.gnu.org/archive/html/qemu-devel/2023-07/msg02891.html
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Message-ID: <20230912132423.268494-13-dbarboza@ventanamicro.com>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> docs/about/deprecated.rst | 12 ++++++++++++
> target/riscv/cpu.c | 5 +++++
> 2 files changed, 17 insertions(+)
>
> diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
> index 8b136320e2..5e3965a674 100644
> --- a/docs/about/deprecated.rst
> +++ b/docs/about/deprecated.rst
> @@ -327,6 +327,18 @@ QEMU's ``vhost`` feature, which would eliminate the high latency costs under
> which the 9p ``proxy`` backend currently suffers. However as of to date nobody
> has indicated plans for such kind of reimplementation unfortunately.
>
> +RISC-V 'any' CPU type ``-cpu any`` (since 8.2)
You forgot to update linux-user/riscv/target_elf.h, which still uses "any", and thus all
qemu-riscv64 invocations trigger the warning.
r~
next prev parent reply other threads:[~2023-10-19 18:14 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-12 4:09 [PULL 00/54] riscv-to-apply queue Alistair Francis
2023-10-12 4:09 ` [PULL 01/54] target/riscv/cpu.c: split CPU options from riscv_cpu_extensions[] Alistair Francis
2023-10-12 4:09 ` [PULL 02/54] target/riscv/cpu.c: skip 'bool' check when filtering KVM props Alistair Francis
2023-10-12 4:10 ` [PULL 03/54] target/riscv/cpu.c: split kvm prop handling to its own helper Alistair Francis
2023-10-12 4:10 ` [PULL 04/54] target/riscv: add DEFINE_PROP_END_OF_LIST() to riscv_cpu_options[] Alistair Francis
2023-10-12 4:10 ` [PULL 05/54] target/riscv/cpu.c: split non-ratified exts from riscv_cpu_extensions[] Alistair Francis
2023-10-12 4:10 ` [PULL 06/54] target/riscv/cpu.c: split vendor " Alistair Francis
2023-10-12 4:10 ` [PULL 07/54] target/riscv/cpu.c: add riscv_cpu_add_qdev_prop_array() Alistair Francis
2023-10-12 4:10 ` [PULL 08/54] target/riscv/cpu.c: add riscv_cpu_add_kvm_unavail_prop_array() Alistair Francis
2023-10-12 4:10 ` [PULL 09/54] target/riscv/cpu.c: limit cfg->vext_spec log message Alistair Francis
2023-10-12 4:10 ` [PULL 10/54] target/riscv: add 'max' CPU type Alistair Francis
2023-10-12 4:10 ` [PULL 11/54] avocado, risc-v: add tuxboot tests for 'max' CPU Alistair Francis
2023-10-12 4:10 ` [PULL 12/54] target/riscv: deprecate the 'any' CPU type Alistair Francis
2023-10-19 18:13 ` Richard Henderson [this message]
2023-10-19 18:31 ` Daniel Henrique Barboza
2023-10-20 10:10 ` Peter Maydell
2023-10-12 4:10 ` [PULL 13/54] target/riscv/cpu.c: use offset in isa_ext_is_enabled/update_enabled Alistair Francis
2023-10-12 4:10 ` [PULL 14/54] target/riscv: make CPUCFG() macro public Alistair Francis
2023-10-12 4:10 ` [PULL 15/54] target/riscv/cpu.c: introduce cpu_cfg_ext_auto_update() Alistair Francis
2023-10-12 4:10 ` [PULL 16/54] target/riscv/cpu.c: use cpu_cfg_ext_auto_update() during realize() Alistair Francis
2023-10-12 4:10 ` [PULL 17/54] target/riscv/cpu.c: introduce RISCVCPUMultiExtConfig Alistair Francis
2023-10-12 4:10 ` [PULL 18/54] target/riscv: use isa_ext_update_enabled() in init_max_cpu_extensions() Alistair Francis
2023-10-12 4:10 ` [PULL 19/54] target/riscv/cpu.c: honor user choice in cpu_cfg_ext_auto_update() Alistair Francis
2023-10-12 4:10 ` [PULL 20/54] target/riscv/cpu.c: consider user option with RVG Alistair Francis
2023-10-12 4:10 ` [PULL 21/54] target/riscv: Clear CSR values at reset and sync MPSTATE with host Alistair Francis
2023-10-12 4:10 ` [PULL 22/54] disas/riscv: Fix the typo of inverted order of pmpaddr13 and pmpaddr14 Alistair Francis
2023-10-12 4:10 ` [PULL 23/54] target/riscv: introduce TCG AccelCPUClass Alistair Francis
2023-10-12 4:10 ` [PULL 24/54] target/riscv: move riscv_cpu_realize_tcg() to TCG::cpu_realizefn() Alistair Francis
2023-10-12 4:10 ` [PULL 25/54] target/riscv: move riscv_cpu_validate_set_extensions() to tcg-cpu.c Alistair Francis
2023-10-12 4:10 ` [PULL 26/54] target/riscv: move riscv_tcg_ops " Alistair Francis
2023-10-12 4:10 ` [PULL 27/54] target/riscv/cpu.c: add .instance_post_init() Alistair Francis
2023-10-12 4:10 ` [PULL 28/54] target/riscv: move 'host' CPU declaration to kvm.c Alistair Francis
2023-10-12 4:10 ` [PULL 29/54] target/riscv/cpu.c: mark extensions arrays as 'const' Alistair Francis
2023-10-12 4:10 ` [PULL 30/54] target/riscv: move riscv_cpu_add_kvm_properties() to kvm.c Alistair Francis
2023-10-12 4:10 ` [PULL 31/54] target/riscv: make riscv_add_satp_mode_properties() public Alistair Francis
2023-10-12 4:10 ` [PULL 32/54] target/riscv: remove kvm-stub.c Alistair Francis
2023-10-12 4:10 ` [PULL 33/54] target/riscv: introduce KVM AccelCPUClass Alistair Francis
2023-10-12 4:10 ` [PULL 34/54] target/riscv: move KVM only files to kvm subdir Alistair Francis
2023-10-12 4:10 ` [PULL 35/54] target/riscv/kvm: do not use riscv_cpu_add_misa_properties() Alistair Francis
2023-10-12 4:10 ` [PULL 36/54] target/riscv/cpu.c: export set_misa() Alistair Francis
2023-10-12 4:10 ` [PULL 37/54] target/riscv/tcg: introduce tcg_cpu_instance_init() Alistair Francis
2023-10-12 4:10 ` [PULL 38/54] target/riscv/cpu.c: make misa_ext_cfgs[] 'const' Alistair Francis
2023-10-12 4:10 ` [PULL 39/54] target/riscv/tcg: move riscv_cpu_add_misa_properties() to tcg-cpu.c Alistair Francis
2023-10-12 4:10 ` [PULL 40/54] target/riscv/cpu.c: export isa_edata_arr[] Alistair Francis
2023-10-12 4:10 ` [PULL 41/54] target/riscv/cpu: move priv spec functions to tcg-cpu.c Alistair Francis
2023-10-12 4:10 ` [PULL 42/54] target/riscv: add riscv_cpu_get_name() Alistair Francis
2023-10-12 4:10 ` [PULL 43/54] target/riscv/tcg-cpu.c: add extension properties for all cpus Alistair Francis
2023-10-12 4:10 ` [PULL 44/54] softmmu: add means to pass an exit code when requesting a shutdown Alistair Francis
2023-10-12 4:10 ` [PULL 45/54] softmmu: pass the main loop status to gdb "Wxx" packet Alistair Francis
2023-10-12 4:10 ` [PULL 46/54] hw/misc/sifive_test.c: replace exit calls with proper shutdown Alistair Francis
2023-10-12 4:10 ` [PULL 47/54] hw/char: riscv_htif: " Alistair Francis
2023-10-12 4:10 ` [PULL 48/54] gdbstub: replace exit calls with proper shutdown for softmmu Alistair Francis
2023-10-12 4:10 ` [PULL 49/54] target/riscv/kvm: improve 'init_multiext_cfg' error msg Alistair Francis
2023-10-12 4:10 ` [PULL 50/54] target/riscv/kvm: support KVM_GET_REG_LIST Alistair Francis
2023-10-12 4:10 ` [PULL 51/54] target/riscv/tcg: remove RVG warning Alistair Francis
2023-10-12 4:10 ` [PULL 52/54] target/riscv: Use env_archcpu for better performance Alistair Francis
2023-10-12 4:10 ` [PULL 53/54] target/riscv: deprecate capital 'Z' CPU properties Alistair Francis
2023-10-12 4:10 ` [PULL 54/54] target/riscv: Fix vfwmaccbf16.vf Alistair Francis
2023-10-12 18:51 ` [PULL 00/54] riscv-to-apply queue Stefan Hajnoczi
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