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From: Richard Henderson <richard.henderson@linaro.org>
To: Pierrick Bouvier <pierrick.bouvier@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH 18/23] accel/tcg: Call cpu_ld*_code_mmu from cpu_ld*_code
Date: Thu, 10 Oct 2024 12:31:56 -0700	[thread overview]
Message-ID: <7de0fccc-456f-446c-8c01-19daed0a3f5d@linaro.org> (raw)
In-Reply-To: <32195e57-9e94-4060-80cb-911505813788@linaro.org>

On 10/9/24 17:23, Pierrick Bouvier wrote:
> On 10/9/24 08:08, Richard Henderson wrote:
>> Ensure a common entry point for all code lookups.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   accel/tcg/cputlb.c | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
>> index 59ee766d51..61daa89e06 100644
>> --- a/accel/tcg/cputlb.c
>> +++ b/accel/tcg/cputlb.c
>> @@ -2954,28 +2954,28 @@ uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr)
>>   {
>>       CPUState *cs = env_cpu(env);
>>       MemOpIdx oi = make_memop_idx(MO_UB, cpu_mmu_index(cs, true));
>> -    return do_ld1_mmu(cs, addr, oi, 0, MMU_INST_FETCH);
>> +    return cpu_ldb_code_mmu(env, addr, oi, 0);
>>   }
>>   uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr)
>>   {
>>       CPUState *cs = env_cpu(env);
>>       MemOpIdx oi = make_memop_idx(MO_TEUW, cpu_mmu_index(cs, true));
>> -    return do_ld2_mmu(cs, addr, oi, 0, MMU_INST_FETCH);
>> +    return cpu_ldw_code_mmu(env, addr, oi, 0);
>>   }
>>   uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr)
>>   {
>>       CPUState *cs = env_cpu(env);
>>       MemOpIdx oi = make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true));
>> -    return do_ld4_mmu(cs, addr, oi, 0, MMU_INST_FETCH);
>> +    return cpu_ldl_code_mmu(env, addr, oi, 0);
>>   }
>>   uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
>>   {
>>       CPUState *cs = env_cpu(env);
>>       MemOpIdx oi = make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true));
>> -    return do_ld8_mmu(cs, addr, oi, 0, MMU_INST_FETCH);
>> +    return cpu_ldq_code_mmu(env, addr, oi, 0);
>>   }
>>   uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr,
> 
> This will still call the same functions behind _code_mmu variants, but I guess it's more 
> coherent overall.
> 
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>

Previously, I was modifying cpu_ld*_code_mmu, so this mattered.
But I dropped that, so I should drop this as well.


r~


  reply	other threads:[~2024-10-10 19:32 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-09 15:08 [RFC PATCH 00/23] accel/tcg: Convert victim tlb to IntervalTree Richard Henderson
2024-10-09 15:08 ` [PATCH 01/23] util/interval-tree: Introduce interval_tree_free_nodes Richard Henderson
2024-10-09 22:51   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 02/23] accel/tcg: Split out tlbfast_flush_locked Richard Henderson
2024-10-09 18:54   ` Philippe Mathieu-Daudé
2024-10-09 22:53   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 03/23] accel/tcg: Split out tlbfast_{index,entry} Richard Henderson
2024-10-09 22:55   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 04/23] accel/tcg: Split out tlbfast_flush_range_locked Richard Henderson
2024-10-09 23:05   ` Pierrick Bouvier
2024-10-10  1:20     ` Richard Henderson
2024-10-11 17:09       ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 05/23] accel/tcg: Fix flags usage in mmu_lookup1, atomic_mmu_lookup Richard Henderson
2024-10-09 23:18   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 06/23] accel/tcg: Early exit for zero length in tlb_flush_range_by_mmuidx* Richard Henderson
2024-10-09 18:53   ` Philippe Mathieu-Daudé
2024-10-09 23:20   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 07/23] accel/tcg: Flush entire tlb when a masked range wraps Richard Henderson
2024-10-09 23:28   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 08/23] accel/tcg: Add IntervalTreeRoot to CPUTLBDesc Richard Henderson
2024-10-09 23:31   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 09/23] accel/tcg: Populate IntervalTree in tlb_set_page_full Richard Henderson
2024-10-09 23:50   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 10/23] accel/tcg: Remove IntervalTree entry in tlb_flush_page_locked Richard Henderson
2024-10-09 23:53   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 11/23] accel/tcg: Remove IntervalTree entries in tlb_flush_range_locked Richard Henderson
2024-10-09 23:57   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 12/23] accel/tcg: Process IntervalTree entries in tlb_reset_dirty Richard Henderson
2024-10-10  0:03   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 13/23] accel/tcg: Process IntervalTree entries in tlb_set_dirty Richard Henderson
2024-10-10  0:04   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 14/23] accel/tcg: Replace victim_tlb_hit with tlbtree_hit Richard Henderson
2024-10-10  0:10   ` Pierrick Bouvier
2024-10-10 19:29     ` Richard Henderson
2024-10-11 17:11       ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 15/23] accel/tcg: Remove the victim tlb Richard Henderson
2024-10-10  0:12   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 16/23] include/exec/tlb-common: Move CPUTLBEntryFull from hw/core/cpu.h Richard Henderson
2024-10-10  0:17   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 17/23] accel/tcg: Delay plugin adjustment in probe_access_internal Richard Henderson
2024-10-10  0:19   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 18/23] accel/tcg: Call cpu_ld*_code_mmu from cpu_ld*_code Richard Henderson
2024-10-09 18:51   ` Philippe Mathieu-Daudé
2024-10-10  0:23   ` Pierrick Bouvier
2024-10-10 19:31     ` Richard Henderson [this message]
2024-10-09 15:08 ` [PATCH 19/23] accel/tcg: Always use IntervalTree for code lookups Richard Henderson
2024-10-10  0:35   ` Pierrick Bouvier
2024-10-11 14:47     ` Richard Henderson
2024-10-11 17:55       ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 20/23] accel/tcg: Link CPUTLBEntry to CPUTLBEntryTree Richard Henderson
2024-10-10  0:37   ` Pierrick Bouvier
2024-10-09 15:08 ` [PATCH 21/23] accel/tcg: Remove CPUTLBDesc.fulltlb Richard Henderson
2024-10-10  0:38   ` Pierrick Bouvier
2024-10-09 15:08 ` [NOTYET PATCH 22/23] accel/tcg: Drop TCGCPUOps.tlb_fill Richard Henderson
2024-10-10  0:40   ` Pierrick Bouvier
2024-10-09 15:08 ` [NOTYET PATCH 23/23] accel/tcg: Unexport tlb_set_page* Richard Henderson
2024-10-09 16:27 ` [RFC PATCH 00/23] accel/tcg: Convert victim tlb to IntervalTree BALATON Zoltan
2024-10-09 17:10   ` Richard Henderson
2024-10-10  0:50     ` Pierrick Bouvier
2024-10-15  0:07       ` Richard Henderson

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