From: Richard Henderson <rth@twiddle.net>
To: Pranith Kumar <bobby.prani@gmail.com>, alex.bennee@linaro.org
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [RFC PATCH 3/3] tcg/aarch64: Remove code buffer size limitation
Date: Thu, 8 Jun 2017 09:58:19 -0700 [thread overview]
Message-ID: <7e1288f4-8f85-a92b-d92d-2608e29a13c2@twiddle.net> (raw)
In-Reply-To: <20170607225212.23714-4-bobby.prani@gmail.com>
On 06/07/2017 03:52 PM, Pranith Kumar wrote:
> This enables indirect jump on aarch64 hosts. Tested by booting an x86 guest on aarch64 host.
This patch is doing too many things.
One patch should be the switch to indirect chaining (which should also squash
in the 2/3 patch, otherwise tcg_out_insn_3305 is unused and therefore provokes
a Werror).
Second, you should consider merely softening the code buffer size limitation to
2GB. At that point, we still use just ADRP+ADD to form the return address for
exit_tb.
Third, if you want to go beyond 2GB to no limit at all, then we need to
consider reserving a register to contain the return address back to the epilogue.
r~
prev parent reply other threads:[~2017-06-08 16:58 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-07 22:52 [Qemu-devel] [RFC PATCH 0/3] Remove code buffer size limitation on aarch64 hosts Pranith Kumar
2017-06-07 22:52 ` [Qemu-devel] [RFC PATCH 1/3] tcg/aarch64: Introduce and use jump to register Pranith Kumar
2017-06-08 16:50 ` Richard Henderson
2017-06-07 22:52 ` [Qemu-devel] [RFC PATCH 2/3] tcg/aarch64: Introdue LDR (literal) for aarch64 Pranith Kumar
2017-06-07 22:52 ` [Qemu-devel] [RFC PATCH 3/3] tcg/aarch64: Remove code buffer size limitation Pranith Kumar
2017-06-08 16:58 ` Richard Henderson [this message]
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