Re: [PATCH RFC v2] target/arm: Implement SVE2 FLOGB

[Richard Henderson <richard.henderson@linaro.org>]

On 4/30/20 12:14 PM, Stephen Long wrote:
> Signed-off-by: Stephen Long <steplong@quicinc.com>
> ---
> 
> I made the changes Richard requested. I took out the status field for
> the helper function.
> 
>  include/fpu/softfloat.h    |  5 +++
>  target/arm/helper-sve.h    |  4 +++
>  target/arm/sve.decode      |  4 +++
>  target/arm/sve_helper.c    | 63 ++++++++++++++++++++++++++++++++++++++
>  target/arm/translate-sve.c |  9 ++++++
>  5 files changed, 85 insertions(+)
> 
> diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
> index ecb8ba0114..275d138145 100644
> --- a/include/fpu/softfloat.h
> +++ b/include/fpu/softfloat.h
> @@ -260,6 +260,11 @@ static inline int float16_is_zero_or_denormal(float16 a)
>      return (float16_val(a) & 0x7c00) == 0;
>  }
>  
> +static inline bool float16_is_normal(float16 a)
> +{
> +    return (((float16_val(a) >> 10) + 1) & 0x1f) >= 2;
> +}

I split this out to its own patch.

> +static int16_t do_float16_logb_as_int(float16 a)
> +{
> +    if (float16_is_normal(a)) {
> +        return extract16(a, 10, 5) - 15;
> +    } else if (float16_is_infinity(a)) {
> +        return INT16_MAX;
> +    } else if (float16_is_any_nan(a) || float16_is_zero(a)) {
> +        return INT16_MIN;
> +    }
> +    // denormal

CODING_STYLE prohibits c++ comments.  Fixed.

> +static bool trans_FLOGB(DisasContext *s, arg_rpr_esz *a)
> +{
> +    static gen_helper_gvec_3 * const fns[] = {
> +        NULL,               gen_helper_flogb_h,
> +        gen_helper_flogb_s, gen_helper_flogb_d
> +    };
> +    return do_sve2_zpz_ool(s, a, fns[a->esz - 1]);

Incorrect subtract in the indexing.  Fixed.

Queued with the above changes.


r~