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[174.21.143.238]) by smtp.gmail.com with ESMTPSA id d5sm3207964pjo.20.2020.06.16.12.33.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 Jun 2020 12:33:16 -0700 (PDT) Subject: Re: [PATCH RFC v2] target/arm: Implement SVE2 FLOGB To: Stephen Long , qemu-devel@nongnu.org References: <20200430191405.21641-1-steplong@quicinc.com> From: Richard Henderson Message-ID: <7e1a5f0f-fed1-781b-7c38-7eade05e16f7@linaro.org> Date: Tue, 16 Jun 2020 12:33:14 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <20200430191405.21641-1-steplong@quicinc.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::442; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x442.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, apazos@quicinc.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 4/30/20 12:14 PM, Stephen Long wrote: > Signed-off-by: Stephen Long > --- > > I made the changes Richard requested. I took out the status field for > the helper function. > > include/fpu/softfloat.h | 5 +++ > target/arm/helper-sve.h | 4 +++ > target/arm/sve.decode | 4 +++ > target/arm/sve_helper.c | 63 ++++++++++++++++++++++++++++++++++++++ > target/arm/translate-sve.c | 9 ++++++ > 5 files changed, 85 insertions(+) > > diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h > index ecb8ba0114..275d138145 100644 > --- a/include/fpu/softfloat.h > +++ b/include/fpu/softfloat.h > @@ -260,6 +260,11 @@ static inline int float16_is_zero_or_denormal(float16 a) > return (float16_val(a) & 0x7c00) == 0; > } > > +static inline bool float16_is_normal(float16 a) > +{ > + return (((float16_val(a) >> 10) + 1) & 0x1f) >= 2; > +} I split this out to its own patch. > +static int16_t do_float16_logb_as_int(float16 a) > +{ > + if (float16_is_normal(a)) { > + return extract16(a, 10, 5) - 15; > + } else if (float16_is_infinity(a)) { > + return INT16_MAX; > + } else if (float16_is_any_nan(a) || float16_is_zero(a)) { > + return INT16_MIN; > + } > + // denormal CODING_STYLE prohibits c++ comments. Fixed. > +static bool trans_FLOGB(DisasContext *s, arg_rpr_esz *a) > +{ > + static gen_helper_gvec_3 * const fns[] = { > + NULL, gen_helper_flogb_h, > + gen_helper_flogb_s, gen_helper_flogb_d > + }; > + return do_sve2_zpz_ool(s, a, fns[a->esz - 1]); Incorrect subtract in the indexing. Fixed. Queued with the above changes. r~