From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: Sourabh Jain <sourabhjain@linux.ibm.com>,
Aditya Gupta <adityag@linux.ibm.com>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
"Nicholas Piggin" <npiggin@gmail.com>,
"Daniel Henrique Barboza" <danielhb413@gmail.com>,
"Mahesh J Salgaonkar" <mahesh@linux.ibm.com>,
"Hari Bathini" <hbathini@linux.ibm.com>,
"Chinmay Rath" <rathc@linux.ibm.com>,
"Thomas Huth" <thuth@redhat.com>,
"Shivang Upadhyay" <shivangu@linux.ibm.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH v5 4/8] hw/ppc: Implement saving CPU state in Fadump
Date: Thu, 23 Oct 2025 16:50:02 +0530 [thread overview]
Message-ID: <7e3aa7fe-13b2-432a-bb0b-9dae4aed00fa@linux.ibm.com> (raw)
In-Reply-To: <4802ecac-e8af-4e47-ab21-ebc70bea8d95@linux.ibm.com>
On 10/23/25 16:46, Sourabh Jain wrote:
>
>
> On 23/10/25 16:41, Aditya Gupta wrote:
>> On 25/10/23 02:35PM, Sourabh Jain wrote:
>>>
>>>> <...snip...>
>>>> + /*
>>>> + * CPUSTRT and CPUEND register entries follow this format:
>>>> + *
>>>> + * 8 Bytes Reg ID (BE) | 4 Bytes (0x0) | 4 Bytes Logical CPU ID
>>>> (BE)
>>>> + */
>>>> + curr_reg_entry->reg_id =
>>>> + cpu_to_be64(fadump_str_to_u64("CPUSTRT"));
>>>> + curr_reg_entry->reg_value = cpu_to_be64(
>>>> + ppc_cpu->vcpu_id & FADUMP_CPU_ID_MASK);
>>> Seems like converting full 64 bit CPU ID to 64 bit BE value will not
>>> bring
>>> reg
>>> entry in below format. Isn't it?
>>>
>>> 8 Bytes Identifier (BE) | 4 Bytes Reserved (0x0) | 4 Bytes Logical
>>> CPU ID
>>> (BE)
>>>
>>>> <...snip...>
>>>> + /* End the registers for this CPU with "CPUEND" reg entry */
>>>> + curr_reg_entry->reg_id =
>>>> + cpu_to_be64(fadump_str_to_u64("CPUEND"));
>>>> + curr_reg_entry->reg_value = cpu_to_be64(
>>>> + ppc_cpu->vcpu_id & FADUMP_CPU_ID_MASK);
>>> Same here.
>> It will be in the same format, since even with storing 8 bytes at once,
>> we do a 8 byte swap on the CPU ID, thus bringing the cpu id in the
>> higher 4 bytes only (considering CPU ID fits in 4 bytes as ensured by
>> the FADUMP_CPU_ID_MASK).
>>
>> So, it still follows the above format, just that it does not explicitly
>> use 4 byte blocks.
>>
>> This is also consistent with how the Linux kernel reads this field:
>>
>> /* Lower 4 bytes of reg_value contains logical cpu id */
>> cpu = (be64_to_cpu(reg_entry->reg_value) &
>> RTAS_FADUMP_CPU_ID_MASK);
>
> Yeah looks good to me now. Thanks.
>
> Reviewed-by: Sourabh Jain <sourabhjain@linux.ibm.com>
Thanks Sourabh and Shivang for your diligent reviews and validation efforts.
Queued.
regards,
Harsh
>
next prev parent reply other threads:[~2025-10-23 11:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-21 13:48 [PATCH v5 0/8] Implement Firmware Assisted Dump for PSeries Aditya Gupta
2025-10-21 13:48 ` [PATCH v5 1/8] hw/ppc: Implement fadump register command Aditya Gupta
2025-10-23 8:16 ` Sourabh Jain
2025-10-23 11:06 ` Aditya Gupta
2025-10-21 13:48 ` [PATCH v5 2/8] hw/ppc: Trigger Fadump boot if fadump is registered Aditya Gupta
2025-10-23 8:18 ` Sourabh Jain
2025-10-21 13:48 ` [PATCH v5 3/8] hw/ppc: Preserve memory regions registered for fadump Aditya Gupta
2025-10-23 8:39 ` Sourabh Jain
2025-10-21 13:48 ` [PATCH v5 4/8] hw/ppc: Implement saving CPU state in Fadump Aditya Gupta
2025-10-23 9:05 ` Sourabh Jain
2025-10-23 11:11 ` Aditya Gupta
2025-10-23 11:16 ` Sourabh Jain
2025-10-23 11:20 ` Harsh Prateek Bora [this message]
2025-10-23 11:15 ` Aditya Gupta
2025-10-21 13:48 ` [PATCH v5 5/8] hw/ppc: Pass dump-sizes property for fadump in device tree Aditya Gupta
2025-10-23 9:08 ` Sourabh Jain
2025-10-21 13:48 ` [PATCH v5 6/8] hw/ppc: Enable fadump for PSeries Aditya Gupta
2025-10-23 9:08 ` Sourabh Jain
2025-10-23 11:17 ` Aditya Gupta
2025-10-21 13:48 ` [PATCH v5 7/8] tests/functional: Add test for fadump in PSeries Aditya Gupta
2025-10-21 13:48 ` [PATCH v5 8/8] MAINTAINERS: Add entry for FADump (pSeries) Aditya Gupta
2025-10-23 9:10 ` Sourabh Jain
2025-10-23 7:21 ` [PATCH v5 0/8] Implement Firmware Assisted Dump for PSeries shivang upadhyay
2025-10-23 7:35 ` Aditya Gupta
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