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([2001:8003:c020:6900:12c1:9684:874a:fb3a]) by smtp.gmail.com with ESMTPSA id y1-20020a170902ed4100b001cfcd2fb7b0sm10344027plb.285.2023.12.27.14.47.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 Dec 2023 14:47:15 -0800 (PST) Message-ID: <7e91f6d1-51e3-4530-ae83-54aa028538c1@linaro.org> Date: Thu, 28 Dec 2023 09:47:10 +1100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 16/35] target/arm: Trap registers when HCR_EL2.{NV, NV1} == {1, 1} Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20231218113305.2511480-1-peter.maydell@linaro.org> <20231218113305.2511480-17-peter.maydell@linaro.org> From: Richard Henderson In-Reply-To: <20231218113305.2511480-17-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/18/23 22:32, Peter Maydell wrote: > When HCR_EL2.{NV,NV1} is {1,1} we must trap five extra registers to > EL2: VBAR_EL1, ELR_EL1, SPSR_EL1, SCXTNUM_EL1 and TFSR_EL1. > Implement these traps. > > This trap does not apply when FEAT_NV2 is implemented and enabled; > include the check that HCR_EL2.NV2 is 0 here, to save us having > to come back and add it later. > > Signed-off-by: Peter Maydell > --- > I have mostly implemented FEAT_NV2 after FEAT_NV, but in > this particular case it seemed cleaner to include the NV2 > bit check from the start. > --- > target/arm/helper.c | 44 ++++++++++++++++++++++++++++++++++++++++---- > 1 file changed, 40 insertions(+), 4 deletions(-) Reviewed-by: Richard Henderson > @@ -7807,6 +7820,16 @@ static CPAccessResult access_mte(CPUARMState *env, const ARMCPRegInfo *ri, > } > return CP_ACCESS_OK; > } > +static CPAccessResult access_tfsr_el1(CPUARMState *env, const ARMCPRegInfo *ri, Spacing. r~