Re: [PULL 00/32] aspeed queue

[Richard Henderson <richard.henderson@linaro.org>]

On 9/29/25 09:51, Cédric Le Goater wrote:
> The following changes since commit 4975b64efb5aa4248cbc3760312bbe08d6e71638:
> 
>    Merge tag 'pull-loongarch-20250928' ofhttps://github.com/bibo-mao/qemu into staging (2025-09-28 09:01:35 -0700)
> 
> are available in the Git repository at:
> 
>    https://github.com/legoater/qemu/ tags/pull-aspeed-20250929
> 
> for you to fetch changes up to 9ec30a07483640ecb8417fce3dfa9273f7a036c9:
> 
>    hw/arm/aspeed_ast27x0-fc: Make sub-init functions return bool with errp (2025-09-29 18:00:20 +0200)
> 
> ----------------------------------------------------------------
> aspeed queue:
> 
> * Introduce a new ASPEED OTP memory device model integrated with the
>    Secure Boot Controller. It includes a new block device backend
>    ('drive' property), is enabled for AST2600 SoCs and AST1030 SoCs.
>    Functional tests are included
> * Changed "ast2700-evb" alias to point to the "ast2700a1-evb" machine
> * Introduce support for Aspeed PCIe host controller, including models
>    for the PCIe Root Complex, Root Port, and PHY. Enabled for the
>    AST2600 and AST2700 SoCs, and functional tests are included
> * Refactor Boot ROM support to improve code reuse across the different
>    Aspeed machine. This is in preparation of vbootrom support in the
>    ast2700fc machine
> * Improved Error Handling in the AST27x0-fc machine init functions


Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.

r~