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[189.204.159.168]) by smtp.gmail.com with ESMTPSA id h9sm1346177ooi.22.2021.03.25.10.01.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 25 Mar 2021 10:01:30 -0700 (PDT) Subject: Re: [PATCH v2 for-6.0?] hw/pci-host/gpex: Don't fault for unmapped parts of MMIO and PIO windows To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20210325163315.27724-1-peter.maydell@linaro.org> From: Richard Henderson Message-ID: <7eddd70f-3d78-f711-1044-209be206365c@linaro.org> Date: Thu, 25 Mar 2021 11:01:27 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210325163315.27724-1-peter.maydell@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::235; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x235.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Dmitry Vyukov , Arnd Bergmann , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/25/21 10:33 AM, Peter Maydell wrote: > Currently the gpex PCI controller implements no special behaviour for > guest accesses to areas of the PIO and MMIO where it has not mapped > any PCI devices, which means that for Arm you end up with a CPU > exception due to a data abort. > > Most host OSes expect "like an x86 PC" behaviour, where bad accesses > like this return -1 for reads and ignore writes. In the interests of > not being surprising, make host CPU accesses to these windows behave > as -1/discard where there's no mapped PCI device. > > The old behaviour generally didn't cause any problems, because > almost always the guest OS will map the PCI devices and then only > access where it has mapped them. One corner case where you will see > this kind of access is if Linux attempts to probe legacy ISA > devices via a PIO window access. So far the only case where we've > seen this has been via the syzkaller fuzzer. > > Reported-by: Dmitry Vyukov > Fixes:https://bugs.launchpad.net/qemu/+bug/1918917 > Signed-off-by: Peter Maydell > --- > v1->v2 changes: put in the hw_compat machinery. > > Still not sure if I want to put this in 6.0 or not. I know what you mean. > > include/hw/pci-host/gpex.h | 4 +++ > hw/core/machine.c | 1 + > hw/pci-host/gpex.c | 56 ++++++++++++++++++++++++++++++++++++-- > 3 files changed, 58 insertions(+), 3 deletions(-) That said, the code looks fine, so, Reviewed-by: Richard Henderson r~