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From: Laurent Vivier <lvivier@redhat.com>
To: David Gibson <david@gibson.dropbear.id.au>,
	groug@kaod.org, wei.guo.simon@gmail.com
Cc: ldoktor@redhat.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] target/ppc: Fix backwards migration of msr_mask
Date: Tue, 20 Mar 2018 09:08:58 +0100	[thread overview]
Message-ID: <7f2928ef-14a7-c431-028f-41597c5fda66@redhat.com> (raw)
In-Reply-To: <20180320022319.17199-1-david@gibson.dropbear.id.au>

On 20/03/2018 03:23, David Gibson wrote:
> 21b786f "PowerPC: Add TS bits into msr_mask" added the transaction states
> to msr_mask for recent POWER CPUs to allow correct migration of machines
> that are in certain interim transactional memory states.
> 
> This was correct, but unfortunately breaks backwards of pseries-2.7 and
> earlier machine types which (stupidly) transferred the msr_mask in the
> migration stream and failed if it wasn't equal on each end.
> 
> This works around the problem by masking out the new MSR bits in the
> compatibility code to send the msr_mask on old machine types.
> 
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
>  target/ppc/machine.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)

Reviewed-by: Laurent Vivier <lvivier@redhat.com>

  reply	other threads:[~2018-03-20  8:09 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-20  2:23 [Qemu-devel] [PATCH] target/ppc: Fix backwards migration of msr_mask David Gibson
2018-03-20  8:08 ` Laurent Vivier [this message]
2018-03-20  9:41 ` Greg Kurz
2018-03-20 12:17 ` Lukáš Doktor
2018-04-04  3:27 ` Simon Guo

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