From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PULL 00/55] target-arm queue
Date: Thu, 9 Jun 2022 08:24:41 -0700 [thread overview]
Message-ID: <7f67f4f4-533c-19fa-454d-4b72e1b49a11@linaro.org> (raw)
In-Reply-To: <20220609090537.1971756-1-peter.maydell@linaro.org>
On 6/9/22 02:04, Peter Maydell wrote:
> The following changes since commit 6d940eff4734bcb40b1a25f62d7cec5a396f994a:
>
> Merge tag 'pull-tpm-2022-06-07-1' of https://github.com/stefanberger/qemu-tpm into staging (2022-06-07 19:22:18 -0700)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220609
>
> for you to fetch changes up to 414c54d515dba16bfaef643a8acec200c05f229a:
>
> target/arm: Add ID_AA64SMFR0_EL1 (2022-06-08 19:38:59 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * target/arm: Declare support for FEAT_RASv1p1
> * target/arm: Implement FEAT_DoubleFault
> * Fix 'writeable' typos
> * xlnx_dp: Implement vblank interrupt
> * target/arm: Move page-table-walk code to ptw.c
> * target/arm: Preparatory patches for SME support
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/7.1 as appropriate.
r~
>
> ----------------------------------------------------------------
> Frederic Konrad (2):
> xlnx_dp: fix the wrong register size
> xlnx-zynqmp: fix the irq mapping for the display port and its dma
>
> Peter Maydell (3):
> target/arm: Declare support for FEAT_RASv1p1
> target/arm: Implement FEAT_DoubleFault
> Fix 'writeable' typos
>
> Richard Henderson (48):
> target/arm: Move stage_1_mmu_idx decl to internals.h
> target/arm: Move get_phys_addr to ptw.c
> target/arm: Move get_phys_addr_v5 to ptw.c
> target/arm: Move get_phys_addr_v6 to ptw.c
> target/arm: Move get_phys_addr_pmsav5 to ptw.c
> target/arm: Move get_phys_addr_pmsav7_default to ptw.c
> target/arm: Move get_phys_addr_pmsav7 to ptw.c
> target/arm: Move get_phys_addr_pmsav8 to ptw.c
> target/arm: Move pmsav8_mpu_lookup to ptw.c
> target/arm: Move pmsav7_use_background_region to ptw.c
> target/arm: Move v8m_security_lookup to ptw.c
> target/arm: Move m_is_{ppb,system}_region to ptw.c
> target/arm: Move get_level1_table_address to ptw.c
> target/arm: Move combine_cacheattrs and subroutines to ptw.c
> target/arm: Move get_phys_addr_lpae to ptw.c
> target/arm: Move arm_{ldl,ldq}_ptw to ptw.c
> target/arm: Move {arm_s1_, }regime_using_lpae_format to tlb_helper.c
> target/arm: Move arm_pamax, pamax_map into ptw.c
> target/arm: Move get_S1prot, get_S2prot to ptw.c
> target/arm: Move check_s2_mmu_setup to ptw.c
> target/arm: Move aa32_va_parameters to ptw.c
> target/arm: Move ap_to_tw_prot etc to ptw.c
> target/arm: Move regime_is_user to ptw.c
> target/arm: Move regime_ttbr to ptw.c
> target/arm: Move regime_translation_disabled to ptw.c
> target/arm: Move arm_cpu_get_phys_page_attrs_debug to ptw.c
> target/arm: Move stage_1_mmu_idx, arm_stage1_mmu_idx to ptw.c
> target/arm: Pass CPUARMState to arm_ld[lq]_ptw
> target/arm: Rename TBFLAG_A64 ZCR_LEN to VL
> linux-user/aarch64: Introduce sve_vq
> target/arm: Remove route_to_el2 check from sve_exception_el
> target/arm: Remove fp checks from sve_exception_el
> target/arm: Add el_is_in_host
> target/arm: Use el_is_in_host for sve_zcr_len_for_el
> target/arm: Use el_is_in_host for sve_exception_el
> target/arm: Hoist arm_is_el2_enabled check in sve_exception_el
> target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset
> target/arm: Merge aarch64_sve_zcr_get_valid_len into caller
> target/arm: Use uint32_t instead of bitmap for sve vq's
> target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el
> target/arm: Split out load/store primitives to sve_ldst_internal.h
> target/arm: Export sve contiguous ldst support functions
> target/arm: Move expand_pred_b to vec_internal.h
> target/arm: Use expand_pred_b in mve_helper.c
> target/arm: Move expand_pred_h to vec_internal.h
> target/arm: Export bfdotadd from vec_helper.c
> target/arm: Add isar_feature_aa64_sme
> target/arm: Add ID_AA64SMFR0_EL1
>
> Sai Pavan Boddu (2):
> xlnx_dp: Introduce a vblank signal
> xlnx_dp: Fix the interrupt disable logic
>
> docs/interop/vhost-user.rst | 2 +-
> docs/specs/vmgenid.txt | 4 +-
> docs/system/arm/emulation.rst | 2 +
> hw/scsi/mfi.h | 2 +-
> include/hw/display/xlnx_dp.h | 12 +-
> linux-user/aarch64/target_prctl.h | 20 +-
> target/arm/cpu.h | 66 +-
> target/arm/internals.h | 45 +-
> target/arm/kvm_arm.h | 7 +-
> target/arm/sve_ldst_internal.h | 221 +++
> target/arm/translate-a64.h | 2 +-
> target/arm/translate.h | 2 +-
> target/arm/vec_internal.h | 28 +-
> target/i386/hvf/vmcs.h | 2 +-
> target/i386/hvf/vmx.h | 2 +-
> accel/hvf/hvf-accel-ops.c | 4 +-
> accel/kvm/kvm-all.c | 4 +-
> accel/tcg/user-exec.c | 6 +-
> hw/acpi/ghes.c | 2 +-
> hw/arm/xlnx-zynqmp.c | 4 +-
> hw/display/xlnx_dp.c | 49 +-
> hw/intc/arm_gicv3_cpuif.c | 2 +-
> hw/intc/arm_gicv3_dist.c | 2 +-
> hw/intc/arm_gicv3_redist.c | 4 +-
> hw/intc/riscv_aclint.c | 2 +-
> hw/intc/riscv_aplic.c | 2 +-
> hw/pci/shpc.c | 2 +-
> hw/sparc64/sun4u_iommu.c | 2 +-
> hw/timer/sse-timer.c | 2 +-
> linux-user/aarch64/signal.c | 4 +-
> target/arm/arch_dump.c | 2 +-
> target/arm/cpu.c | 5 +-
> target/arm/cpu64.c | 120 +-
> target/arm/gdbstub.c | 2 +-
> target/arm/gdbstub64.c | 2 +-
> target/arm/helper.c | 2742 ++-----------------------------------
> target/arm/hvf/hvf.c | 4 +-
> target/arm/kvm64.c | 47 +-
> target/arm/mve_helper.c | 6 +-
> target/arm/ptw.c | 2540 ++++++++++++++++++++++++++++++++++
> target/arm/sve_helper.c | 232 +---
> target/arm/tlb_helper.c | 26 +
> target/arm/translate-a64.c | 2 +-
> target/arm/translate-sve.c | 2 +-
> target/arm/vec_helper.c | 28 +-
> target/i386/cpu-sysemu.c | 2 +-
> target/s390x/ioinst.c | 2 +-
> python/qemu/machine/machine.py | 2 +-
> target/arm/meson.build | 1 +
> tests/tcg/x86_64/system/boot.S | 2 +-
> 50 files changed, 3240 insertions(+), 3037 deletions(-)
> create mode 100644 target/arm/sve_ldst_internal.h
> create mode 100644 target/arm/ptw.c
>
prev parent reply other threads:[~2022-06-09 15:56 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-09 9:04 [PULL 00/55] target-arm queue Peter Maydell
2022-06-09 9:04 ` [PULL 01/55] target/arm: Declare support for FEAT_RASv1p1 Peter Maydell
2022-06-09 9:04 ` [PULL 02/55] target/arm: Implement FEAT_DoubleFault Peter Maydell
2022-06-09 9:04 ` [PULL 03/55] Fix 'writeable' typos Peter Maydell
2022-06-09 9:04 ` [PULL 04/55] xlnx_dp: fix the wrong register size Peter Maydell
2022-06-09 9:04 ` [PULL 05/55] xlnx_dp: Introduce a vblank signal Peter Maydell
2022-06-09 9:04 ` [PULL 06/55] xlnx_dp: Fix the interrupt disable logic Peter Maydell
2022-06-09 9:04 ` [PULL 07/55] xlnx-zynqmp: fix the irq mapping for the display port and its dma Peter Maydell
2022-06-09 9:04 ` [PULL 08/55] target/arm: Move stage_1_mmu_idx decl to internals.h Peter Maydell
2022-06-09 9:04 ` [PULL 09/55] target/arm: Move get_phys_addr to ptw.c Peter Maydell
2022-06-09 9:04 ` [PULL 10/55] target/arm: Move get_phys_addr_v5 " Peter Maydell
2022-06-09 9:04 ` [PULL 11/55] target/arm: Move get_phys_addr_v6 " Peter Maydell
2022-06-09 9:04 ` [PULL 12/55] target/arm: Move get_phys_addr_pmsav5 " Peter Maydell
2022-06-09 9:04 ` [PULL 13/55] target/arm: Move get_phys_addr_pmsav7_default " Peter Maydell
2022-06-09 9:04 ` [PULL 14/55] target/arm: Move get_phys_addr_pmsav7 " Peter Maydell
2022-06-09 9:04 ` [PULL 15/55] target/arm: Move get_phys_addr_pmsav8 " Peter Maydell
2022-06-09 9:04 ` [PULL 16/55] target/arm: Move pmsav8_mpu_lookup " Peter Maydell
2022-06-09 9:04 ` [PULL 17/55] target/arm: Move pmsav7_use_background_region " Peter Maydell
2022-06-09 9:05 ` [PULL 18/55] target/arm: Move v8m_security_lookup " Peter Maydell
2022-06-09 9:05 ` [PULL 19/55] target/arm: Move m_is_{ppb,system}_region " Peter Maydell
2022-06-09 9:05 ` [PULL 20/55] target/arm: Move get_level1_table_address " Peter Maydell
2022-06-09 9:05 ` [PULL 21/55] target/arm: Move combine_cacheattrs and subroutines " Peter Maydell
2022-06-09 9:05 ` [PULL 22/55] target/arm: Move get_phys_addr_lpae " Peter Maydell
2022-06-09 9:05 ` [PULL 23/55] target/arm: Move arm_{ldl,ldq}_ptw " Peter Maydell
2022-06-09 9:05 ` [PULL 24/55] target/arm: Move {arm_s1_, }regime_using_lpae_format to tlb_helper.c Peter Maydell
2022-06-09 9:05 ` [PULL 25/55] target/arm: Move arm_pamax, pamax_map into ptw.c Peter Maydell
2022-06-09 9:05 ` [PULL 26/55] target/arm: Move get_S1prot, get_S2prot to ptw.c Peter Maydell
2022-06-09 9:05 ` [PULL 27/55] target/arm: Move check_s2_mmu_setup " Peter Maydell
2022-06-09 9:05 ` [PULL 28/55] target/arm: Move aa32_va_parameters " Peter Maydell
2022-06-09 9:05 ` [PULL 29/55] target/arm: Move ap_to_tw_prot etc " Peter Maydell
2022-06-09 9:05 ` [PULL 30/55] target/arm: Move regime_is_user " Peter Maydell
2022-06-09 9:05 ` [PULL 31/55] target/arm: Move regime_ttbr " Peter Maydell
2022-06-09 9:05 ` [PULL 32/55] target/arm: Move regime_translation_disabled " Peter Maydell
2022-06-09 9:05 ` [PULL 33/55] target/arm: Move arm_cpu_get_phys_page_attrs_debug " Peter Maydell
2022-06-09 9:05 ` [PULL 34/55] target/arm: Move stage_1_mmu_idx, arm_stage1_mmu_idx " Peter Maydell
2022-06-09 9:05 ` [PULL 35/55] target/arm: Pass CPUARMState to arm_ld[lq]_ptw Peter Maydell
2022-06-09 9:05 ` [PULL 36/55] target/arm: Rename TBFLAG_A64 ZCR_LEN to VL Peter Maydell
2022-06-09 9:05 ` [PULL 37/55] linux-user/aarch64: Introduce sve_vq Peter Maydell
2022-06-09 9:05 ` [PULL 38/55] target/arm: Remove route_to_el2 check from sve_exception_el Peter Maydell
2022-06-09 9:05 ` [PULL 39/55] target/arm: Remove fp checks " Peter Maydell
2022-06-09 9:05 ` [PULL 40/55] target/arm: Add el_is_in_host Peter Maydell
2022-06-09 9:05 ` [PULL 41/55] target/arm: Use el_is_in_host for sve_zcr_len_for_el Peter Maydell
2022-06-09 9:05 ` [PULL 42/55] target/arm: Use el_is_in_host for sve_exception_el Peter Maydell
2022-06-09 9:05 ` [PULL 43/55] target/arm: Hoist arm_is_el2_enabled check in sve_exception_el Peter Maydell
2022-06-09 9:05 ` [PULL 44/55] target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset Peter Maydell
2022-06-09 9:05 ` [PULL 45/55] target/arm: Merge aarch64_sve_zcr_get_valid_len into caller Peter Maydell
2022-06-09 9:05 ` [PULL 46/55] target/arm: Use uint32_t instead of bitmap for sve vq's Peter Maydell
2022-06-09 9:05 ` [PULL 47/55] target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el Peter Maydell
2022-06-09 9:05 ` [PULL 48/55] target/arm: Split out load/store primitives to sve_ldst_internal.h Peter Maydell
2022-06-09 9:05 ` [PULL 49/55] target/arm: Export sve contiguous ldst support functions Peter Maydell
2022-06-09 9:05 ` [PULL 50/55] target/arm: Move expand_pred_b to vec_internal.h Peter Maydell
2022-06-09 9:05 ` [PULL 51/55] target/arm: Use expand_pred_b in mve_helper.c Peter Maydell
2022-06-09 9:05 ` [PULL 52/55] target/arm: Move expand_pred_h to vec_internal.h Peter Maydell
2022-06-09 9:05 ` [PULL 53/55] target/arm: Export bfdotadd from vec_helper.c Peter Maydell
2022-06-09 9:05 ` [PULL 54/55] target/arm: Add isar_feature_aa64_sme Peter Maydell
2022-06-09 9:05 ` [PULL 55/55] target/arm: Add ID_AA64SMFR0_EL1 Peter Maydell
2022-06-09 15:24 ` Richard Henderson [this message]
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