From: Richard Henderson <richard.henderson@linaro.org>
To: Lijun Pan <ljp@linux.ibm.com>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
david@gibson.dropbear.id.au
Subject: Re: [PATCH v5 3/6] target/ppc: add vmulh{su}w instructions
Date: Fri, 24 Jul 2020 10:57:51 -0700 [thread overview]
Message-ID: <7fb84b5a-b32f-4c2a-7359-2aaabf34814d@linaro.org> (raw)
In-Reply-To: <20200724045845.89976-4-ljp@linux.ibm.com>
On 7/23/20 9:58 PM, Lijun Pan wrote:
> vmulhsw: Vector Multiply High Signed Word
> vmulhuw: Vector Multiply High Unsigned Word
>
> Signed-off-by: Lijun Pan <ljp@linux.ibm.com>
> ---
> v4/v5: no change
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> v3: inline the helper_vmulh{su}w multiply directly instead of using macro
> v2: fix coding style
> use Power ISA 3.1 flag
The Reviewed-by tag goes above the "---" marker so that it is included when the
patch is applied.
r~
next prev parent reply other threads:[~2020-07-24 17:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-24 4:58 [PATCH v5 0/6] Add several Power ISA 3.1 32/64-bit vector instructions Lijun Pan
2020-07-24 4:58 ` [PATCH v5 1/6] Update PowerPC AT_HWCAP2 definition Lijun Pan
2020-07-24 17:54 ` Richard Henderson
2020-07-24 4:58 ` [PATCH v5 2/6] target/ppc: add vmulld to INDEX_op_mul_vec case Lijun Pan
2020-07-24 17:56 ` Richard Henderson
2020-07-24 4:58 ` [PATCH v5 3/6] target/ppc: add vmulh{su}w instructions Lijun Pan
2020-07-24 17:57 ` Richard Henderson [this message]
2020-07-27 6:32 ` David Gibson
2020-07-24 4:58 ` [PATCH v5 4/6] target/ppc: add vmulh{su}d instructions Lijun Pan
2020-07-24 4:58 ` [PATCH v5 5/6] target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions Lijun Pan
2020-07-24 4:58 ` [PATCH v5 6/6] target/ppc: add vmsumudm vmsumcud instructions Lijun Pan
2020-07-24 18:00 ` Richard Henderson
2020-07-24 18:46 ` Lijun Pan
2020-07-24 23:07 ` Lijun Pan
2020-07-27 6:33 ` [PATCH v5 0/6] Add several Power ISA 3.1 32/64-bit vector instructions David Gibson
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