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[176.184.25.155]) by smtp.gmail.com with ESMTPSA id ov3-20020a170906fc0300b00977cad140a8sm5694156ejb.218.2023.11.14.07.22.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 14 Nov 2023 07:22:26 -0800 (PST) Message-ID: <7fd25b34-6fd9-4f7c-90b4-e44338b2b09e@linaro.org> Date: Tue, 14 Nov 2023 16:22:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH-for-9.0 v2 06/19] hw/pci/msi: Restrict xen_is_pirq_msi() call to Xen Content-Language: en-US To: David Woodhouse , David Woodhouse , qemu-devel@nongnu.org Cc: =?UTF-8?Q?Alex_Benn=C3=A9e?= , Paul Durrant , qemu-arm@nongnu.org, Paolo Bonzini , Stefano Stabellini , Richard Henderson , xen-devel@lists.xenproject.org, qemu-block@nongnu.org, Anthony Perard , kvm@vger.kernel.org, Thomas Huth , "Michael S. Tsirkin" , Marcel Apfelbaum References: <20231114143816.71079-1-philmd@linaro.org> <20231114143816.71079-7-philmd@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=philmd@linaro.org; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 14/11/23 16:13, David Woodhouse wrote: > On 14 November 2023 09:38:02 GMT-05:00, "Philippe Mathieu-Daudé" wrote: >> Similarly to the restriction in hw/pci/msix.c (see commit >> e1e4bf2252 "msix: fix msix_vector_masked"), restrict the >> xen_is_pirq_msi() call in msi_is_masked() to Xen. >> >> Signed-off-by: Philippe Mathieu-Daudé > > Hm, we do also support the Xen abomination of snooping on MSI table writes to see if they're targeted at a Xen PIRQ, then actually unmasking the MSI from QEMU when the guest binds the corresponding event channel to that PIRQ. > > I think this is going to break in CI as kvm_xen_guest.py does deliberately exercise that use case, doesn't it? Hmmm I see what you mean. So you mentioned these checks: - host Xen accel - Xen accel emulated to guest via KVM host accel Maybe we need here: - guest expected to run Xen Being ( Xen accel emulated to guest via KVM host accel OR host Xen accel ) If so, possibly few places incorrectly check 'xen_enabled()' instead of this 'xen_guest()'. "Xen on KVM" is a tricky case... > I deliberately *didn't* switch to testing the Xen PV net device, with a comment that testing MSI and irqchip permutations was far more entertaining. So I hope it should catch this? ¯\_(ツ)_/¯