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From: Richard Henderson <richard.henderson@linaro.org>
To: John Arbuckle <programmingkidx@gmail.com>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.orgd,
	david@gibson.dropbear.id.au, mark.cave-ayland@ilande.co.uk
Subject: Re: [Qemu-devel] [PATCH 1/2] Implement Floating Point flag Fraction Rounded
Date: Tue, 11 Jun 2019 14:00:52 -0700	[thread overview]
Message-ID: <808906c8-fa73-26f5-cead-3fa35ddb4497@linaro.org> (raw)
In-Reply-To: <20190525022008.24788-2-programmingkidx@gmail.com>

On 5/24/19 7:20 PM, John Arbuckle wrote:
> Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
> ---
>  fpu/softfloat.c               | 15 ++++++++++++---
>  include/fpu/softfloat-types.h |  1 +
>  2 files changed, 13 insertions(+), 3 deletions(-)

There are additional places that need changing within this file, even if we
consider only float32 and float64 and ignore floatx80 and float128.

That said, merely renaming this patch to

  "softfloat: Implement float_flag_rounded in round_canonical

  Add a new flag to indicate that, when inexact, the result has
  been rounded.  That is, when the LSB of the rounded result
  differs from the same bit of the infinite precision result."

is enough to get

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

For your usage within PowerPC, you will additionally need to modify round_to_int.


r~


  reply	other threads:[~2019-06-11 21:08 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-25  2:20 [Qemu-devel] [PATCH 0/2] Implement PowerPC FPSCR flag Fraction Rounded John Arbuckle
2019-05-25  2:20 ` [Qemu-devel] [PATCH 1/2] Implement Floating Point " John Arbuckle
2019-06-11 21:00   ` Richard Henderson [this message]
2019-05-25  2:20 ` [Qemu-devel] [PATCH 2/2] Implement the PowerPC Floating Point Status and Control Register Fraction Rounded bit John Arbuckle

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