qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Xiaoyao Li <xiaoyao.li@intel.com>
To: 小太 <nospam@kota.moe>, qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, babu.moger@amd.com
Subject: Re: [PATCH] target/i386: Fix reporting of CPU dies when nr_cores=nr_threads=1
Date: Thu, 27 Jul 2023 09:25:50 +0800	[thread overview]
Message-ID: <80dc2f6b-6cc7-c8fc-44c6-e6529c35d445@intel.com> (raw)
In-Reply-To: <20230723185909.441455-1-nospam@kota.moe>

On 7/24/2023 2:59 AM, 小太 wrote:
> When QEMU is started with `-smp D,sockets=1,dies=D,cores=1,threads=1` (that
> is, 1 socket with D dies but each die contains just a single thread), both
> Linux and Windows guests incorrectly interprets the system as having D
> sockets with 1 die each
> 
> Ultimately this is caused by various CPUID leaves not being die-aware in
> their "threads per socket" calculations, so this patch fixes that
> 
> These changes are referenced to the AMD PPR for Family 19h Model 01h (Milan)
> and Family 17h Model 01h (Naples) manuals:
>   - CPUID_Fn00000001_EBX[23:16]: Number of threads in the processor
>                                  (Core::X86::Cpuid::SizeId[NC] + 1)
>   - CPUID_Fn0000000B_EBX_x01[15:0]: Number of logical cores in processor
>                                     socket (not present until Rome)
>   - CPUID_Fn80000001_ECX[1]: Multi core product
>                              (Core::X86::Cpuid::SizeId[NC] != 0)
>   - CPUID_Fn80000008_ECX[7:0]: The number of threads in the package - 1
>                                (Core::X86::Cpuid::SizeId[NC])
> 
> Note there are two remaining occurences that I didn't touch:
>   - CPUID_Fn8000001E_ECX[10:8]: Always 0 (1 node per processor) for Milan.
>                                 But for Naples, it can also be 2 or 4 nodes
>                                 where each node is defined as one or two
>                                 CCXes (CCD?). But Milan also has multiple
>                                 CCXes, so clearly the definition of a node is
>                                 different from model to model, so I've left
>                                 it untouched. (QEMU seems to use the Naples
>                                 definition)
>   - MSR_CORE_THREAD_COUNT: This MSR doesn't exist on Milan or Naples

Is this patch specific to AMD CPU type? what's situation for Intel CPU?



  reply	other threads:[~2023-07-27  1:40 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-23 18:59 [PATCH] target/i386: Fix reporting of CPU dies when nr_cores=nr_threads=1 小太
2023-07-27  1:25 ` Xiaoyao Li [this message]
2023-07-27  9:16   ` ‍小太
2023-08-15 17:38     ` ‍小太
2023-08-16  8:37 ` Wen, Qian

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=80dc2f6b-6cc7-c8fc-44c6-e6529c35d445@intel.com \
    --to=xiaoyao.li@intel.com \
    --cc=babu.moger@amd.com \
    --cc=nospam@kota.moe \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).