From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43)
	id 1Hyv2Q-0001Dn-P9
	for qemu-devel@nongnu.org; Thu, 14 Jun 2007 15:31:22 -0400
Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43)
	id 1Hyv2P-0001Db-JB
	for qemu-devel@nongnu.org; Thu, 14 Jun 2007 15:31:22 -0400
Received: from [199.232.76.173] (helo=monty-python.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.43) id 1Hyv2P-0001DY-DW
	for qemu-devel@nongnu.org; Thu, 14 Jun 2007 15:31:21 -0400
Received: from py-out-1112.google.com ([64.233.166.181])
	by monty-python.gnu.org with esmtp (Exim 4.60)
	(envelope-from <rileyrd@gmail.com>) id 1Hyv2P-00012I-3r
	for qemu-devel@nongnu.org; Thu, 14 Jun 2007 15:31:21 -0400
Received: by py-out-1112.google.com with SMTP id y77so1259642pyg
	for <qemu-devel@nongnu.org>; Thu, 14 Jun 2007 12:31:20 -0700 (PDT)
Message-ID: <812074ac0706141231w3e132296s98974e9527a3cdfd@mail.gmail.com>
Date: Thu, 14 Jun 2007 15:31:20 -0400
From: "Ryan Riley" <rileyrd@gmail.com>
Subject: Re: [Qemu-devel] CPUTLBEntry Question
In-Reply-To: <200706141422.13852.paul@codesourcery.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Content-Transfer-Encoding: 7bit
Content-Disposition: inline
References: <812074ac0706131325t578dfd5eiaa5836b160a24679@mail.gmail.com>
	<200706141422.13852.paul@codesourcery.com>
Reply-To: qemu-devel@nongnu.org
List-Id: qemu-devel.nongnu.org
List-Unsubscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.gnu.org/pipermail/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Paul Brook <paul@codesourcery.com>
Cc: qemu-devel@nongnu.org

On 6/14/07, Paul Brook <paul@codesourcery.com> wrote:
> > then QEMU crashes on startup.  (It also crashes if I put that blah
> > entry on the beginning instead of the end.)  I'm sure there's code
> > somewhere that must be making assumptions about the size of TLB entry,
> > but I'm at a loss for finding it.  (I have noticed that the assembly
> > code in softmmu_header.h indexes to the addend based on addr_read or
> > addr_write, but adding a new member to the end of the structure
> > shouldn't impact that, right?)
>
> Wrong. The assembly implementation assumes CPUTLBEntry is 16 bytes (or to be
> exact 1 << CPU_TLB_ENTRY_BITS).
>
> The C implementation in softmmu_header.h will work with any layout.
>
> Paul
>

That fixed/answered everything for me.  Thanks for your help, everyone.

Thanks
Ryan