From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Bin Meng <bmeng.cn@gmail.com>, Alistair Francis <alistair23@gmail.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH v2 1/9] riscv/boot: Add a missing header include
Date: Thu, 14 May 2020 19:51:11 +0200 [thread overview]
Message-ID: <81488a39-a2b0-b9c7-59a6-233052aaa4f6@redhat.com> (raw)
In-Reply-To: <CAEUhbmWoT0oBszNsY7mPHD+nkY0pOXwN-M0q-AZS45_6p5vG4Q@mail.gmail.com>
On 5/14/20 5:46 PM, Bin Meng wrote:
> On Thu, May 14, 2020 at 11:38 PM Alistair Francis <alistair23@gmail.com> wrote:
>>
>> On Thu, May 14, 2020 at 8:34 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>>>
>>> On Fri, May 8, 2020 at 3:24 AM Alistair Francis
>>> <alistair.francis@wdc.com> wrote:
>>>>
>>>> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
>>>> ---
>>>> include/hw/riscv/boot.h | 1 +
>>>> 1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
>>>> index 474a940ad5..9daa98da08 100644
>>>> --- a/include/hw/riscv/boot.h
>>>> +++ b/include/hw/riscv/boot.h
>>>> @@ -21,6 +21,7 @@
>>>> #define RISCV_BOOT_H
>>>>
>>>> #include "exec/cpu-defs.h"
>>>> +#include "hw/loader.h"
>>>
>>> Why is this needed? Currently this does not break build.
>>
>> Currently every c file that includes boot.h also includes loader.h
>> before it. Which is why the build works fine. We should be able to
>> include just boot.h though so this is a small fixup to allow that.
>>
>
> I wonder if this is a required convention to make the header file
> self-contained? The only thing that is offending seems to be the
> symbol_fn_t typedef.
Indeed the use of the symbol_fn_t typedef justifies including its
declaration :)
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>
> Regards,
> Bin
>
next prev parent reply other threads:[~2020-05-14 17:51 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-07 19:12 [PATCH v2 0/9] RISC-V Add the OpenTitan Machine Alistair Francis
2020-05-07 19:13 ` [PATCH v2 1/9] riscv/boot: Add a missing header include Alistair Francis
2020-05-14 15:33 ` Bin Meng
2020-05-14 15:30 ` Alistair Francis
2020-05-14 15:46 ` Bin Meng
2020-05-14 17:51 ` Philippe Mathieu-Daudé [this message]
2020-05-15 5:00 ` Bin Meng
2020-05-07 19:13 ` [PATCH v2 2/9] target/riscv: Don't overwrite the reset vector Alistair Francis
2020-05-14 17:54 ` Philippe Mathieu-Daudé
2020-05-14 21:42 ` Alistair Francis
2020-05-15 4:54 ` Bin Meng
2020-05-15 19:43 ` Alistair Francis
2020-05-16 9:03 ` Bin Meng
2020-05-19 18:03 ` Alistair Francis
2020-05-07 19:13 ` [PATCH v2 3/9] target/riscv: Add the lowRISC Ibex CPU Alistair Francis
2020-05-15 4:57 ` Bin Meng
2020-05-07 19:13 ` [PATCH v2 4/9] riscv: Initial commit of OpenTitan machine Alistair Francis
2020-05-15 5:14 ` Bin Meng
2020-05-07 19:13 ` [PATCH v2 5/9] hw/char: Initial commit of Ibex UART Alistair Francis
2020-05-14 17:59 ` Philippe Mathieu-Daudé
2020-05-14 21:59 ` Alistair Francis
2020-05-15 7:25 ` Philippe Mathieu-Daudé
2020-05-15 7:28 ` Philippe Mathieu-Daudé
2020-05-15 19:46 ` Alistair Francis
2020-05-07 19:13 ` [PATCH v2 6/9] hw/intc: Initial commit of lowRISC Ibex PLIC Alistair Francis
2020-05-14 18:40 ` Philippe Mathieu-Daudé
2020-05-14 21:53 ` Alistair Francis
2020-05-07 19:13 ` [PATCH v2 7/9] riscv/opentitan: Connect the PLIC device Alistair Francis
2020-05-15 6:29 ` Bin Meng
2020-05-07 19:13 ` [PATCH v2 8/9] riscv/opentitan: Connect the UART device Alistair Francis
2020-05-15 6:29 ` Bin Meng
2020-05-07 19:13 ` [PATCH v2 9/9] target/riscv: Use a smaller guess size for no-MMU PMP Alistair Francis
2020-05-15 6:28 ` Bin Meng
2020-05-13 18:18 ` [PATCH v2 0/9] RISC-V Add the OpenTitan Machine Alistair Francis
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