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From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org,
	Thomas Huth <thuth@redhat.com>,
	qemu-s390x@nongnu.org, qemu-ppc@nongnu.org
Subject: Re: [PATCH v2 03/10] target/arm: Set disassemble_info::endian value in disas_set_info()
Date: Mon, 10 Feb 2025 15:37:48 -0800	[thread overview]
Message-ID: <81656309-3b6f-45bd-8519-070a366c27cb@linaro.org> (raw)
In-Reply-To: <d831600a-9a61-45c1-a535-f75bb64cdff4@linaro.org>

On 2/10/25 14:59, Philippe Mathieu-Daudé wrote:
> On 10/2/25 23:10, Richard Henderson wrote:
>> On 2/10/25 13:29, Philippe Mathieu-Daudé wrote:
>>> Have the CPUClass::disas_set_info() callback set the
>>> disassemble_info::endian field.
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>> ---
>>>   target/arm/cpu.c | 10 +++-------
>>>   1 file changed, 3 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
>>> index 94f1c55622b..68b3a9d3ab0 100644
>>> --- a/target/arm/cpu.c
>>> +++ b/target/arm/cpu.c
>>> @@ -1188,7 +1188,7 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info 
>>> *info)
>>>   {
>>>       ARMCPU *ac = ARM_CPU(cpu);
>>>       CPUARMState *env = &ac->env;
>>> -    bool sctlr_b;
>>> +    bool sctlr_b = arm_sctlr_b(env);
>>>       if (is_a64(env)) {
>>>           info->cap_arch = CS_ARCH_ARM64;
>>> @@ -1215,13 +1215,9 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info 
>>> *info)
>>>           info->cap_mode = cap_mode;
>>>       }
>>> -    sctlr_b = arm_sctlr_b(env);
>>> +    info->endian = BFD_ENDIAN_LITTLE;
>>>       if (bswap_code(sctlr_b)) {
>>> -#if TARGET_BIG_ENDIAN
>>> -        info->endian = BFD_ENDIAN_LITTLE;
>>> -#else
>>> -        info->endian = BFD_ENDIAN_BIG;
>>> -#endif
>>> +        info->endian = TARGET_BIG_ENDIAN ? BFD_ENDIAN_LITTLE : BFD_ENDIAN_BIG;
>>>       }
>>>       info->flags &= ~INSN_ARM_BE32;
>>>   #ifndef CONFIG_USER_ONLY
>>
>> This is a faithful adjustment to the existing code, so,
>>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>>
>> However:
>>
>> (1) aarch64 code is always little-endian,
>> (2) sctlr_b is always false from armv7 (and thus always false for aarch64)
>> (3) I think the BE32 logic is wrong -- CONFIG_USER_ONLY is irrelevant.
>>      See linux-user/arm/cpu_loop.c, target_cpu_copy_regs.
> 
> What about v7-R [*]? I don't see SCTLR_IE defined as 1<<31 for AArch32,
> only:

BE32 was a really old arm thingy, and I it was removed in armv7 (see arm_sctlr_b).
With BE8 (armv6+), instructions are always little-endian, only data accesses change.

> For the Cortex-r5* we have, SCTLR_IE is always 0 in reset_sctlr.
> 
> Is it OK to consider v7-R implemented as little-endian in QEMU?

Yes.


r~


  reply	other threads:[~2025-02-10 23:39 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-10 21:29 [PATCH v2 00/10] disas: Have CPUClass::disas_set_info() callback set the endianness Philippe Mathieu-Daudé
2025-02-10 21:29 ` [PATCH v2 01/10] target: Set disassemble_info::endian value for little-endian targets Philippe Mathieu-Daudé
2025-02-10 21:54   ` Richard Henderson
2025-02-10 22:05     ` Philippe Mathieu-Daudé
2025-02-10 21:29 ` [PATCH v2 02/10] target: Set disassemble_info::endian value for big-endian targets Philippe Mathieu-Daudé
2025-02-10 21:55   ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 03/10] target/arm: Set disassemble_info::endian value in disas_set_info() Philippe Mathieu-Daudé
2025-02-10 22:10   ` Richard Henderson
2025-02-10 22:59     ` Philippe Mathieu-Daudé
2025-02-10 23:37       ` Richard Henderson [this message]
2025-02-10 21:29 ` [PATCH v2 04/10] target/microblaze: Set disassemble_info::endian value in disas_set_info Philippe Mathieu-Daudé
2025-02-10 22:11   ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 05/10] target/mips: Set disassemble_info::endian value in disas_set_info() Philippe Mathieu-Daudé
2025-02-10 22:12   ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 06/10] target/ppc: " Philippe Mathieu-Daudé
2025-02-10 22:12   ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 07/10] target/riscv: " Philippe Mathieu-Daudé
2025-02-10 22:12   ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 08/10] target/sh4: " Philippe Mathieu-Daudé
2025-02-10 22:13   ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 09/10] target/xtensa: " Philippe Mathieu-Daudé
2025-02-10 22:13   ` Richard Henderson
2025-02-10 21:29 ` [PATCH v2 10/10] disas: Remove target_words_bigendian() call in initialize_debug_target() Philippe Mathieu-Daudé
2025-02-10 22:16   ` Richard Henderson
2025-03-06 13:58 ` [PATCH v2 00/10] disas: Have CPUClass::disas_set_info() callback set the endianness Philippe Mathieu-Daudé
2025-03-06 14:00   ` Philippe Mathieu-Daudé

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