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[83.59.163.107]) by smtp.gmail.com with ESMTPSA id h15sm1002784ejj.43.2021.02.03.05.34.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 03 Feb 2021 05:34:42 -0800 (PST) Subject: Re: [PATCH v15 23/23] accel-cpu: make cpu_realizefn return a bool To: Claudio Fontana , =?UTF-8?Q?Alex_Benn=c3=a9e?= , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Peter Maydell References: <20210201100903.17309-1-cfontana@suse.de> <20210201100903.17309-24-cfontana@suse.de> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <81bf4dc1-50ee-c2c7-5730-c72861e1794c@redhat.com> Date: Wed, 3 Feb 2021 14:34:41 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <20210201100903.17309-24-cfontana@suse.de> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.539, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.178, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Alistair Francis , Roman Bolshakov , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/1/21 11:09 AM, Claudio Fontana wrote: > overall, all devices' realize functions take an Error **errp, but return void. > > hw/core/qdev.c code, which realizes devices, therefore does: > > local_err = NULL; > dc->realize(dev, &local_err); > if (local_err != NULL) { > goto fail; > } > > However, we can improve at least accel_cpu to return a meaningful bool value. > > Signed-off-by: Claudio Fontana > --- > include/hw/core/accel-cpu.h | 2 +- > include/qemu/accel.h | 2 +- > target/i386/host-cpu.h | 2 +- > accel/accel-common.c | 6 +++--- > cpu.c | 5 +++-- > target/i386/host-cpu.c | 25 ++++++++++++++----------- > target/i386/kvm/kvm-cpu.c | 4 ++-- > target/i386/tcg/tcg-cpu.c | 6 ++++-- > 8 files changed, 29 insertions(+), 23 deletions(-) ... > diff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c > index 9cfe56ce41..4ea9e354ea 100644 > --- a/target/i386/host-cpu.c > +++ b/target/i386/host-cpu.c > @@ -50,7 +50,7 @@ static void host_cpu_enable_cpu_pm(X86CPU *cpu) > env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR; > } > > -static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu, Error **errp) > +static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu) > { > uint32_t host_phys_bits = host_cpu_phys_bits(); > uint32_t phys_bits = cpu->phys_bits; > @@ -77,18 +77,10 @@ static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu, Error **errp) > } > } > > - if (phys_bits && > - (phys_bits > TARGET_PHYS_ADDR_SPACE_BITS || > - phys_bits < 32)) { > - error_setg(errp, "phys-bits should be between 32 and %u " > - " (but is %u)", > - TARGET_PHYS_ADDR_SPACE_BITS, phys_bits); > - } > - > return phys_bits; > } > > -void host_cpu_realizefn(CPUState *cs, Error **errp) > +bool host_cpu_realizefn(CPUState *cs, Error **errp) > { > X86CPU *cpu = X86_CPU(cs); > CPUX86State *env = &cpu->env; > @@ -97,8 +89,19 @@ void host_cpu_realizefn(CPUState *cs, Error **errp) > host_cpu_enable_cpu_pm(cpu); > } > if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { > - cpu->phys_bits = host_cpu_adjust_phys_bits(cpu, errp); > + uint32_t phys_bits = host_cpu_adjust_phys_bits(cpu); > + > + if (phys_bits && > + (phys_bits > TARGET_PHYS_ADDR_SPACE_BITS || > + phys_bits < 32)) { > + error_setg(errp, "phys-bits should be between 32 and %u " > + " (but is %u)", > + TARGET_PHYS_ADDR_SPACE_BITS, phys_bits); Please this change in a preliminary patch (preferably), or comment it in the commit description. Either ways: Reviewed-by: Philippe Mathieu-Daudé > + return false; > + } > + cpu->phys_bits = phys_bits; > } > + return true; > }