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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e4b80besm9988954f8f.83.2025.01.12.10.17.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 12 Jan 2025 10:17:34 -0800 (PST) Message-ID: <821300ca-47f0-4de7-a7ce-a49aeb0d3dbd@linaro.org> Date: Sun, 12 Jan 2025 19:17:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RESEND v2 00/19] hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , qemu-arm@nongnu.org, Richard Henderson , Thomas Huth , Anton Johansson , Bernhard Beschow , Alistair Francis , Paolo Bonzini , Gustavo Romero , =?UTF-8?Q?Marc-Andr=C3=A9_Lureau?= , Peter Maydell , Jason Wang References: <20241114210010.34502-1-philmd@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20241114210010.34502-1-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 14/11/24 21:59, Philippe Mathieu-Daudé wrote: > Philippe Mathieu-Daudé (19): > hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit > hw/net/xilinx_ethlite: Convert some debug logs to trace events > hw/net/xilinx_ethlite: Remove unuseful debug logs > hw/net/xilinx_ethlite: Update QOM style > hw/net/xilinx_ethlite: Correct maximum RX buffer size > hw/net/xilinx_ethlite: Map MDIO registers (as unimplemented) > hw/net/xilinx_ethlite: Rename rxbuf -> port_index > hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper > hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper > hw/net/xilinx_ethlite: Access TX_GIE register for each port > hw/net/xilinx_ethlite: Access TX_LEN register for each port > hw/net/xilinx_ethlite: Access TX_CTRL register for each port > hw/net/xilinx_ethlite: Map RX_CTRL as MMIO > hw/net/xilinx_ethlite: Map TX_LEN as MMIO > hw/net/xilinx_ethlite: Map TX_GIE as MMIO > hw/net/xilinx_ethlite: Map TX_CTRL as MMIO > hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region > hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container' > hw/net/xilinx_ethlite: Map RESERVED I/O as unimplemented Series queued.