From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
qemu-devel@nongnu.org, "Daniel P. Berrangé" <berrange@redhat.com>,
qemu-arm@nongnu.org, alex.bennee@linaro.org, kvm@vger.kernel.org,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>
Subject: Re: [PATCH 11/13] target/arm/cpu: remove inline stubs for aarch32 emulation
Date: Tue, 18 Mar 2025 11:13:51 -0700 [thread overview]
Message-ID: <8291b89a-9e97-47e6-9ee6-fd407066c3bf@linaro.org> (raw)
In-Reply-To: <CAFEAcA9jsFqD-BR+zTzWV1V92fJqpghaOrGq1rDcdidm=R94Pw@mail.gmail.com>
On 3/18/25 11:06, Peter Maydell wrote:
> On Tue, 18 Mar 2025 at 17:52, Pierrick Bouvier
> <pierrick.bouvier@linaro.org> wrote:
>>
>> On 3/18/25 10:50, Peter Maydell wrote:
>>> On Tue, 18 Mar 2025 at 17:42, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>>>>
>>>> On 18/3/25 05:51, Pierrick Bouvier wrote:
>>>>> Directly condition associated calls in target/arm/helper.c for now.
>>>>>
>>>>> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
>>>>> ---
>>>>> target/arm/cpu.h | 8 --------
>>>>> target/arm/helper.c | 6 ++++++
>>>>> 2 files changed, 6 insertions(+), 8 deletions(-)
>>>>>
>>>>> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
>>>>> index 51b6428cfec..9205cbdec43 100644
>>>>> --- a/target/arm/cpu.h
>>>>> +++ b/target/arm/cpu.h
>>>>> @@ -1222,7 +1222,6 @@ int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
>>>>> */
>>>>> void arm_emulate_firmware_reset(CPUState *cpustate, int target_el);
>>>>>
>>>>> -#ifdef TARGET_AARCH64
>>>>> int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
>>>>> int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
>>>>> void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
>>>>> @@ -1254,13 +1253,6 @@ static inline uint64_t *sve_bswap64(uint64_t *dst, uint64_t *src, int nr)
>>>>> #endif
>>>>> }
>>>>>
>>>>> -#else
>>>>> -static inline void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq) { }
>>>>> -static inline void aarch64_sve_change_el(CPUARMState *env, int o,
>>>>> - int n, bool a)
>>>>> -{ }
>>>>> -#endif
>>>>> -
>>>>> void aarch64_sync_32_to_64(CPUARMState *env);
>>>>> void aarch64_sync_64_to_32(CPUARMState *env);
>>>>>
>>>>> diff --git a/target/arm/helper.c b/target/arm/helper.c
>>>>> index b46b2bffcf3..774e1ee0245 100644
>>>>> --- a/target/arm/helper.c
>>>>> +++ b/target/arm/helper.c
>>>>> @@ -6562,7 +6562,9 @@ static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
>>>>> */
>>>>> new_len = sve_vqm1_for_el(env, cur_el);
>>>>> if (new_len < old_len) {
>>>>> +#ifdef TARGET_AARCH64
>>>>
>>>> What about using runtime check instead?
>>>>
>>>> if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && new_len < old_len) {
>>>>
>>>
>>> That would be a dead check: it is not possible to get here
>>> unless ARM_FEATURE_AARCH64 is set.
>>>
>>
>> We can then assert it, to make sure there is no regression around that.
>
> We have a lot of write/read/access fns for AArch64-only sysregs, and
> we don't need to assert in all of them that they're called only when
> the CPU has AArch64 enabled.
>
>> We now have another conversation and something to decide in another
>> file, and that's why I chose to do the minimal change ("ifdef the
>> issue") instead of trying to do any change.
>
> I think we can fairly easily avoid ifdeffing the callsite of
> aarch64_sve_narrow_vq(). Currently we have:
> * a real version of the function, whose definition is inside
> an ifdef TARGET_AARCH64 in target/arm/helper.c
> * a stub version, inline in the cpu.h header
>
> If we don't want to have the stub version with ifdefs, then we can
> move the real implementation of the function to not be inside the
> ifdef (matching the fact that the prototype is no longer inside
> an ifdef). The function doesn't call any other functions that are
> TARGET_AARCH64 only, so it shouldn't be a "now we have to move
> 50 other things" problem, I hope.
>
I'll try to just let the call be done, and see what happens.
But if I meet a regression somewhere in target/arm/*, I'll simply
let the current ifdef for now.
I understand it "should be ok", but I just want to focus on hw/arm, and
not start further changes in target/arm/helper.c as a side effect of
simply moving an ifdef in a header.
> thanks
> -- PMM
next prev parent reply other threads:[~2025-03-18 18:14 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-18 4:51 [PATCH 00/13] single-binary: start make hw/arm/ common (boot.c) Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 01/13] exec/cpu-all: restrict BSWAP_NEEDED to target specific code Pierrick Bouvier
2025-03-18 21:41 ` Richard Henderson
2025-03-18 22:35 ` Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 02/13] exec/cpu-all: restrict compile time assert " Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 03/13] exec/target_page: runtime defintion for TARGET_PAGE_BITS_MIN Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 04/13] exec/cpu-all: allow to include specific cpu Pierrick Bouvier
2025-03-18 22:11 ` Richard Henderson
2025-03-18 22:16 ` Pierrick Bouvier
2025-03-18 22:21 ` Richard Henderson
2025-03-18 22:25 ` Pierrick Bouvier
2025-03-18 22:36 ` Richard Henderson
2025-03-18 22:58 ` Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 05/13] target/arm/cpu: move KVM_HAVE_MCE_INJECTION to kvm-all.c file directly Pierrick Bouvier
2025-03-18 22:19 ` Richard Henderson
2025-03-19 23:06 ` Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 06/13] exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned Pierrick Bouvier
2025-03-18 22:22 ` Richard Henderson
2025-03-18 4:51 ` [PATCH 07/13] target/arm/cpu: always define kvm related registers Pierrick Bouvier
2025-03-18 18:14 ` Philippe Mathieu-Daudé
2025-03-18 18:23 ` Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 08/13] target/arm/cpu: flags2 is always uint64_t Pierrick Bouvier
2025-03-18 22:40 ` Richard Henderson
2025-03-19 23:17 ` Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 09/13] target/arm/cpu: define ARM_MAX_VQ once for aarch32 and aarch64 Pierrick Bouvier
2025-03-18 18:50 ` Philippe Mathieu-Daudé
2025-03-18 22:02 ` Pierrick Bouvier
2025-03-19 7:03 ` Philippe Mathieu-Daudé
2025-03-19 23:09 ` Pierrick Bouvier
2025-03-18 22:44 ` Richard Henderson
2025-03-18 4:51 ` [PATCH 10/13] target/arm/cpu: define same set of registers " Pierrick Bouvier
2025-03-18 22:45 ` Richard Henderson
2025-03-19 23:25 ` Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 11/13] target/arm/cpu: remove inline stubs for aarch32 emulation Pierrick Bouvier
2025-03-18 17:42 ` Philippe Mathieu-Daudé
2025-03-18 17:50 ` Peter Maydell
2025-03-18 17:52 ` Pierrick Bouvier
2025-03-18 18:06 ` Peter Maydell
2025-03-18 18:13 ` Pierrick Bouvier [this message]
2025-03-19 23:35 ` Pierrick Bouvier
2025-03-18 18:44 ` Philippe Mathieu-Daudé
2025-03-18 17:50 ` Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 12/13] meson: add common hw files Pierrick Bouvier
2025-03-18 4:51 ` [PATCH 13/13] hw/arm/boot: make compilation unit hw common Pierrick Bouvier
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