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From: Jan Kiszka <jan.kiszka@siemens.com>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Kane Chen" <kane_chen@aspeedtech.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Jamin Lin" <jamin_lin@aspeedtech.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>,
	"'Peter Xu'" <peterx@redhat.com>,
	"Fabiano Rosas" <farosas@suse.de>
Cc: troy_lee@aspeedtech.com
Subject: Re: [PATCH v2 07/17] hw/arm/aspeed: Attach UART device to AST1700 model
Date: Tue, 11 Nov 2025 06:46:15 +0100	[thread overview]
Message-ID: <82b3079e-0bff-4b27-a0e1-204d787fffc4@siemens.com> (raw)
In-Reply-To: <1d1cf03e-204d-4029-b188-a0e49a59d853@kaod.org>

On 10.11.25 17:04, Cédric Le Goater wrote:
> Hi,
> 
> This change appears complex due to the use of routine
> qdev_set_legacy_instance_id(). It was introduced 15 years ago
> by commit 4d2ffa08b601 ("vmstate: Add support for alias ID"),
> for the PC world AIUI.
> 
> Adding Jan, Peter, Fabiano for feedback on the current relevance
> of qdev_set_legacy_instance_id(), particularly in the ARM/BMC world.
> I feel we could get rid of it and simplify this patch.
> 

I have to dig deep in my memories but if I got it correctly again,
qdev_set_legacy_instance_id is (was) only there to transition an
existing but self-registered vmstate for an existing device model to
qdev-registered vmstate. We neither have a pre-existing device here, nor
do the aspeed machines or devices open-code their vmstate registrations.

Jan

> Thanks,
> 
> C.
> 
> 
> 
> 
> 
> On 11/5/25 04:58, Kane Chen wrote:
>> From: Kane-Chen-AS <kane_chen@aspeedtech.com>
>>
>> Connect the UART controller to the AST1700 model by mapping its MMIO
>> region.
>>
>> Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com>
>> ---
>>   include/hw/misc/aspeed_ast1700.h |  2 ++
>>   hw/arm/aspeed_ast27x0.c          |  2 ++
>>   hw/misc/aspeed_ast1700.c         | 26 ++++++++++++++++++++++++++
>>   3 files changed, 30 insertions(+)
>>
>> diff --git a/include/hw/misc/aspeed_ast1700.h b/include/hw/misc/
>> aspeed_ast1700.h
>> index c2bea11346..e105ceb027 100644
>> --- a/include/hw/misc/aspeed_ast1700.h
>> +++ b/include/hw/misc/aspeed_ast1700.h
>> @@ -28,8 +28,10 @@ struct AspeedAST1700SoCState {
>>       SysBusDevice parent_obj;
>>         MemoryRegion iomem;
>> +    hwaddr mapped_base;
>>         AspeedLTPIState ltpi;
>> +    SerialMM uart;
>>   };
>>     #endif /* ASPEED_AST1700_H */
>> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
>> index 11625e165a..7151feb35d 100644
>> --- a/hw/arm/aspeed_ast27x0.c
>> +++ b/hw/arm/aspeed_ast27x0.c
>> @@ -1070,6 +1070,8 @@ static void
>> aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
>>         /* IO Expander */
>>       for (i = 0; i < sc->ioexp_num; i++) {
>> +        qdev_prop_set_uint64(DEVICE(&s->ioexp[i]), "mapped-base",
>> +                             sc->memmap[ASPEED_DEV_LTPI_IO0 + i]);
>>           if (!sysbus_realize(SYS_BUS_DEVICE(&s->ioexp[i]), errp)) {
>>               return;
>>           }
>> diff --git a/hw/misc/aspeed_ast1700.c b/hw/misc/aspeed_ast1700.c
>> index 0ca2b90ff0..1c2d367cdb 100644
>> --- a/hw/misc/aspeed_ast1700.c
>> +++ b/hw/misc/aspeed_ast1700.c
>> @@ -18,22 +18,39 @@
>>   #define AST2700_SOC_LTPI_SIZE        0x01000000
>>     enum {
>> +    ASPEED_AST1700_DEV_UART12,
>>       ASPEED_AST1700_DEV_LTPI_CTRL,
>>   };
>>     static const hwaddr aspeed_ast1700_io_memmap[] = {
>> +    [ASPEED_AST1700_DEV_UART12]    =  0x00C33B00,
>>       [ASPEED_AST1700_DEV_LTPI_CTRL] =  0x00C34000,
>>   };
>>   static void aspeed_ast1700_realize(DeviceState *dev, Error **errp)
>>   {
>>       AspeedAST1700SoCState *s = ASPEED_AST1700(dev);
>>       SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
>> +    hwaddr uart_base;
>>         /* Occupy memory space for all controllers in AST1700 */
>>       memory_region_init(&s->iomem, OBJECT(s), TYPE_ASPEED_AST1700,
>>                          AST2700_SOC_LTPI_SIZE);
>>       sysbus_init_mmio(sbd, &s->iomem);
>>   +    /* UART */
>> +    uart_base = s->mapped_base +
>> +               aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_UART12];
>> +    qdev_prop_set_uint8(DEVICE(&s->uart), "regshift", 2);
>> +    qdev_prop_set_uint32(DEVICE(&s->uart), "baudbase", 38400);
>> +    qdev_set_legacy_instance_id(DEVICE(&s->uart), uart_base, 2);
>> +    qdev_prop_set_uint8(DEVICE(&s->uart), "endianness",
>> DEVICE_LITTLE_ENDIAN);
>> +    if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) {
>> +        return;
>> +    }
>> +    memory_region_add_subregion(&s->iomem,
>> +                       
>> aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_UART12],
>> +                        sysbus_mmio_get_region(SYS_BUS_DEVICE(&s-
>> >uart), 0));
>> +
>>       /* LTPI controller */
>>       if (!sysbus_realize(SYS_BUS_DEVICE(&s->ltpi), errp)) {
>>           return;
>> @@ -47,6 +64,10 @@ static void aspeed_ast1700_instance_init(Object *obj)
>>   {
>>       AspeedAST1700SoCState *s = ASPEED_AST1700(obj);
>>   +    /* UART */
>> +    object_initialize_child(obj, "uart[*]", &s->uart,
>> +                            TYPE_SERIAL_MM);
>> +
>>       /* LTPI controller */
>>       object_initialize_child(obj, "ltpi-ctrl",
>>                               &s->ltpi, TYPE_ASPEED_LTPI);
>> @@ -54,11 +75,16 @@ static void aspeed_ast1700_instance_init(Object *obj)
>>       return;
>>   }
>>   +static const Property aspeed_ast1700_props[] = {
>> +    DEFINE_PROP_UINT64("mapped-base", AspeedAST1700SoCState,
>> mapped_base, 0),
>> +};
>> +
>>   static void aspeed_ast1700_class_init(ObjectClass *klass, const void
>> *data)
>>   {
>>       DeviceClass *dc = DEVICE_CLASS(klass);
>>         dc->realize = aspeed_ast1700_realize;
>> +    device_class_set_props(dc, aspeed_ast1700_props);
>>   }
>>     static const TypeInfo aspeed_ast1700_info = {
> 

-- 
Siemens AG, Foundational Technologies
Linux Expert Center


  reply	other threads:[~2025-11-11  5:47 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-05  3:58 [PATCH v2 00/17] hw/arm/aspeed: AST1700 LTPI support and device hookups Kane Chen via
2025-11-05  3:58 ` [PATCH v2 01/17] hw/arm/aspeed: Add LTPI controller Kane Chen via
2025-11-07 13:07   ` Cédric Le Goater
2025-11-05  3:58 ` [PATCH v2 02/17] hw/arm/aspeed: Attach LTPI controller to AST27X0 platform Kane Chen via
2025-11-07 13:08   ` Cédric Le Goater
2025-11-05  3:58 ` [PATCH v2 03/17] hw/arm/aspeed: Add AST1700 LTPI expander device model Kane Chen via
2025-11-07 13:10   ` Cédric Le Goater
2025-11-05  3:58 ` [PATCH v2 04/17] hw/arm/aspeed: Integrate AST1700 device into AST27X0 Kane Chen via
2025-11-07 13:30   ` Cédric Le Goater
2025-11-05  3:58 ` [PATCH v2 05/17] hw/arm/aspeed: Integrate interrupt controller for AST1700 Kane Chen via
2025-11-07 13:36   ` Cédric Le Goater
2025-11-10  2:09     ` Kane Chen
2025-11-05  3:58 ` [PATCH v2 06/17] hw/arm/aspeed: Attach LTPI controller to AST1700 model Kane Chen via
2025-11-07 13:36   ` Cédric Le Goater
2025-11-10  2:05     ` Kane Chen
2025-11-05  3:58 ` [PATCH v2 07/17] hw/arm/aspeed: Attach UART device " Kane Chen via
2025-11-10 16:04   ` Cédric Le Goater
2025-11-11  5:46     ` Jan Kiszka [this message]
2025-11-05  3:58 ` [PATCH v2 08/17] hw/arm/aspeed: Attach SRAM " Kane Chen via
2025-11-10 16:08   ` Cédric Le Goater
2025-11-11  1:42     ` Kane Chen
2025-11-05  3:58 ` [PATCH v2 09/17] hw/arm/aspeed: Attach SPI " Kane Chen via
2025-11-05 21:20   ` Nabih Estefan
2025-11-06 10:11     ` Kane Chen
2025-11-06 10:21       ` Cédric Le Goater
2025-11-07  5:39         ` Kane Chen
2025-11-07  7:54           ` Cédric Le Goater
2025-11-05  3:58 ` [PATCH v2 10/17] hw/arm/aspeed: Attach ADC " Kane Chen via
2025-11-05  3:58 ` [PATCH v2 11/17] hw/arm/aspeed: Attach SCU " Kane Chen via
2025-11-05  3:58 ` [PATCH v2 12/17] hw/arm/aspeed: Attach GPIO " Kane Chen via
2025-11-05  3:58 ` [PATCH v2 13/17] hw/arm/aspeed: Attach I2C " Kane Chen via
2025-11-05  3:58 ` [PATCH v2 14/17] hw/arm/aspeed: Attach WDT " Kane Chen via
2025-11-05  3:58 ` [PATCH v2 15/17] hw/arm/aspeed: Model AST1700 I3C block as unimplemented device Kane Chen via
2025-11-07  8:06   ` Cédric Le Goater
2025-11-07  8:41     ` Kane Chen
2025-11-05  3:58 ` [PATCH v2 16/17] hw/arm/aspeed: Model AST1700 SGPIOM " Kane Chen via
2025-11-10 16:14   ` Cédric Le Goater
2025-11-11  1:33     ` Kane Chen
2025-11-12  7:06       ` Cédric Le Goater
2025-11-05  3:58 ` [PATCH v2 17/17] hw/arm/aspeed: Model AST1700 PWM " Kane Chen via
2025-11-10 16:16   ` Cédric Le Goater
2025-11-11  1:27     ` Kane Chen
2025-11-05 10:27 ` [PATCH v2 00/17] hw/arm/aspeed: AST1700 LTPI support and device hookups Cédric Le Goater
2025-11-05 10:34   ` Kane Chen
2025-11-10 16:43 ` Cédric Le Goater
2025-11-11  2:32   ` Kane Chen

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