Re: [PATCH 09/38] target/hexagon: Add guest, system reg number state

[Brian Cain <brian.cain@oss.qualcomm.com>]

On 3/12/2025 2:15 PM, Philippe Mathieu-Daudé wrote:
> Hi Brian,
>
> On 1/3/25 06:25, Brian Cain wrote:
>> From: Brian Cain <bcain@quicinc.com>
>>
>> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
>> ---
>>   target/hexagon/cpu.h |  8 ++++++++
>>   target/hexagon/cpu.c | 17 +++++++++++++++++
>>   2 files changed, 25 insertions(+)
>>
>> diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
>> index 20ea0adcca..b7789a3c90 100644
>> --- a/target/hexagon/cpu.h
>> +++ b/target/hexagon/cpu.h
>> @@ -82,6 +82,14 @@ typedef struct CPUArchState {
>>       target_ulong stack_start;
>>         uint8_t slot_cancelled;
>> +
>> +#ifndef CONFIG_USER_ONLY
>> +    /* Some system registers are per thread and some are global. */
>> +    target_ulong t_sreg[NUM_SREGS];
>> +    target_ulong *g_sreg;
>> +
>> +    target_ulong greg[NUM_GREGS];
>> +#endif
>>       target_ulong new_value_usr;
>>         MemLog mem_log_stores[STORES_MAX];
>> diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
>> index 0b7fc98f6c..355e1eeef3 100644
>> --- a/target/hexagon/cpu.c
>> +++ b/target/hexagon/cpu.c
>> @@ -288,6 +288,14 @@ static void hexagon_cpu_reset_hold(Object *obj, 
>> ResetType type)
>>       set_float_detect_tininess(float_tininess_before_rounding, 
>> &env->fp_status);
>>       /* Default NaN value: sign bit set, all frac bits set */
>>       set_float_default_nan_pattern(0b11111111, &env->fp_status);
>> +
>> +#ifndef CONFIG_USER_ONLY
>> +    if (cs->cpu_index == 0) {
>
> This doesn't scale to heterogeneous emulation.
>
>> +        memset(env->g_sreg, 0, sizeof(target_ulong) * NUM_SREGS);
>> +    }
>> +    memset(env->t_sreg, 0, sizeof(target_ulong) * NUM_SREGS);
>> +    memset(env->greg, 0, sizeof(target_ulong) * NUM_GREGS);
>> +#endif
>>   }
>>     static void hexagon_cpu_disas_set_info(CPUState *s, 
>> disassemble_info *info)
>> @@ -313,6 +321,15 @@ static void hexagon_cpu_realize(DeviceState 
>> *dev, Error **errp)
>>         qemu_init_vcpu(cs);
>>       cpu_reset(cs);
>> +#ifndef CONFIG_USER_ONLY
>> +    if (cs->cpu_index == 0) {
>
> Ditto.
>
>> +        env->g_sreg = g_new0(target_ulong, NUM_SREGS);
>> +    } else {
>> +        CPUState *cpu0 = qemu_get_cpu(0);
>> +        CPUHexagonState *env0 = cpu_env(cpu0);
>> +        env->g_sreg = env0->g_sreg;
>> +    }
>> +#endif
>>         mcc->parent_realize(dev, errp);
>>   }
>
Redesigned with an object to hold this common state instead, in the v2 
series.