* [PATCH v2] spapr/xive: Use the xics flag to check for XIVE-only IRQ backends
@ 2020-08-20 14:01 Cédric Le Goater
2020-08-20 23:22 ` David Gibson
0 siblings, 1 reply; 4+ messages in thread
From: Cédric Le Goater @ 2020-08-20 14:01 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel, Cédric Le Goater
The sPAPR machine has four different IRQ backends, each implementing
the XICS or XIVE interrupt mode or both in the case of the 'dual'
backend.
If a machine is started in P8 compat mode, QEMU should necessarily
support the XICS interrupt mode and in that case, the XIVE-only IRQ
backend is invalid. Currently, spapr_irq_check() tests the pointer
value to the IRQ backend to check for this condition, instead use the
'xics' flag. It's equivalent and it will ease the introduction of new
XIVE-only IRQ backends if needed.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/ppc/spapr_irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
index 80cf1c3d6bb2..d036c8fef519 100644
--- a/hw/ppc/spapr_irq.c
+++ b/hw/ppc/spapr_irq.c
@@ -172,7 +172,7 @@ static int spapr_irq_check(SpaprMachineState *spapr, Error **errp)
* To cover both and not confuse the OS, add an early failure in
* QEMU.
*/
- if (spapr->irq == &spapr_irq_xive) {
+ if (!spapr->irq->xics) {
error_setg(errp, "XIVE-only machines require a POWER9 CPU");
return -1;
}
--
2.25.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] spapr/xive: Use the xics flag to check for XIVE-only IRQ backends
2020-08-20 14:01 [PATCH v2] spapr/xive: Use the xics flag to check for XIVE-only IRQ backends Cédric Le Goater
@ 2020-08-20 23:22 ` David Gibson
2020-08-21 5:39 ` Cédric Le Goater
0 siblings, 1 reply; 4+ messages in thread
From: David Gibson @ 2020-08-20 23:22 UTC (permalink / raw)
To: Cédric Le Goater; +Cc: qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1678 bytes --]
On Thu, Aug 20, 2020 at 04:01:06PM +0200, Cédric Le Goater wrote:
> The sPAPR machine has four different IRQ backends, each implementing
> the XICS or XIVE interrupt mode or both in the case of the 'dual'
> backend.
>
> If a machine is started in P8 compat mode, QEMU should necessarily
> support the XICS interrupt mode and in that case, the XIVE-only IRQ
> backend is invalid. Currently, spapr_irq_check() tests the pointer
> value to the IRQ backend to check for this condition, instead use the
> 'xics' flag. It's equivalent and it will ease the introduction of new
> XIVE-only IRQ backends if needed.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Thanks, applied to ppc-for-5.2.
I still kind of want to remove the last vestiges of those
"backends", but I'm unlikely to have time to do so soon.
> ---
> hw/ppc/spapr_irq.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
> index 80cf1c3d6bb2..d036c8fef519 100644
> --- a/hw/ppc/spapr_irq.c
> +++ b/hw/ppc/spapr_irq.c
> @@ -172,7 +172,7 @@ static int spapr_irq_check(SpaprMachineState *spapr, Error **errp)
> * To cover both and not confuse the OS, add an early failure in
> * QEMU.
> */
> - if (spapr->irq == &spapr_irq_xive) {
> + if (!spapr->irq->xics) {
> error_setg(errp, "XIVE-only machines require a POWER9 CPU");
> return -1;
> }
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] spapr/xive: Use the xics flag to check for XIVE-only IRQ backends
2020-08-20 23:22 ` David Gibson
@ 2020-08-21 5:39 ` Cédric Le Goater
2020-08-21 7:01 ` David Gibson
0 siblings, 1 reply; 4+ messages in thread
From: Cédric Le Goater @ 2020-08-21 5:39 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel, Gustavo Romero
On 8/21/20 1:22 AM, David Gibson wrote:
> On Thu, Aug 20, 2020 at 04:01:06PM +0200, Cédric Le Goater wrote:
>> The sPAPR machine has four different IRQ backends, each implementing
>> the XICS or XIVE interrupt mode or both in the case of the 'dual'
>> backend.
>>
>> If a machine is started in P8 compat mode, QEMU should necessarily
>> support the XICS interrupt mode and in that case, the XIVE-only IRQ
>> backend is invalid. Currently, spapr_irq_check() tests the pointer
>> value to the IRQ backend to check for this condition, instead use the
>> 'xics' flag. It's equivalent and it will ease the introduction of new
>> XIVE-only IRQ backends if needed.
>>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>
> Thanks, applied to ppc-for-5.2.
>
> I still kind of want to remove the last vestiges of those
> "backends", but I'm unlikely to have time to do so soon.
What did you have in mind ?
Move the 'xics' and 'xive' flags directly under the spapr machine ?
It would add state.
C.
>
>> ---
>> hw/ppc/spapr_irq.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
>> index 80cf1c3d6bb2..d036c8fef519 100644
>> --- a/hw/ppc/spapr_irq.c
>> +++ b/hw/ppc/spapr_irq.c
>> @@ -172,7 +172,7 @@ static int spapr_irq_check(SpaprMachineState *spapr, Error **errp)
>> * To cover both and not confuse the OS, add an early failure in
>> * QEMU.
>> */
>> - if (spapr->irq == &spapr_irq_xive) {
>> + if (!spapr->irq->xics) {
>> error_setg(errp, "XIVE-only machines require a POWER9 CPU");
>> return -1;
>> }
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] spapr/xive: Use the xics flag to check for XIVE-only IRQ backends
2020-08-21 5:39 ` Cédric Le Goater
@ 2020-08-21 7:01 ` David Gibson
0 siblings, 0 replies; 4+ messages in thread
From: David Gibson @ 2020-08-21 7:01 UTC (permalink / raw)
To: Cédric Le Goater; +Cc: qemu-ppc, qemu-devel, Gustavo Romero
[-- Attachment #1: Type: text/plain, Size: 1528 bytes --]
On Fri, Aug 21, 2020 at 07:39:34AM +0200, Cédric Le Goater wrote:
> On 8/21/20 1:22 AM, David Gibson wrote:
> > On Thu, Aug 20, 2020 at 04:01:06PM +0200, Cédric Le Goater wrote:
> >> The sPAPR machine has four different IRQ backends, each implementing
> >> the XICS or XIVE interrupt mode or both in the case of the 'dual'
> >> backend.
> >>
> >> If a machine is started in P8 compat mode, QEMU should necessarily
> >> support the XICS interrupt mode and in that case, the XIVE-only IRQ
> >> backend is invalid. Currently, spapr_irq_check() tests the pointer
> >> value to the IRQ backend to check for this condition, instead use the
> >> 'xics' flag. It's equivalent and it will ease the introduction of new
> >> XIVE-only IRQ backends if needed.
> >>
> >> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> >
> > Thanks, applied to ppc-for-5.2.
> >
> > I still kind of want to remove the last vestiges of those
> > "backends", but I'm unlikely to have time to do so soon.
>
> What did you have in mind ?
>
> Move the 'xics' and 'xive' flags directly under the spapr machine ?
> It would add state.
Looking at my draft patches, looks like I was planning to replace the
flags with spapr caps. IIRC there was migration breakage with my
draft, though, can't remember what would be needed to fix it.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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2020-08-20 23:22 ` David Gibson
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